forked from OSchip/llvm-project
72 lines
2.5 KiB
LLVM
72 lines
2.5 KiB
LLVM
; RUN: llc -march=mips -mcpu=mips32 -O0 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck \
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; RUN: %s -check-prefix=MIPS32
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; RUN: llc -march=mips64 -mcpu=mips64 -O0 -relocation-model=pic -target-abi n64 \
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; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=MIPS64
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; RUN: llc -march=mips64 -mcpu=mips64 -O0 -relocation-model=pic -target-abi n32 \
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; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=MIPS64
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; LLVM PR/30197
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; Test that the scheduler does not order loads and stores of arguments that
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; are passed on the stack such that the arguments of the caller are clobbered
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; too early.
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; This test is more fragile than I'd like. The -NEXT directives enforce an
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; assumption that any GOT related instructions will not appear between the
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; loads and stores.
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; O32 case: The last two arguments should appear at 16(sp), 20(sp). The order
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; of the loads doesn't matter, but they have to become before the
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; stores
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define internal i32 @func2(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) {
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%1 = add i32 %a, %b
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%2 = add i32 %1, %c
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%3 = add i32 %2, %d
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%4 = add i32 %3, %e
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%5 = add i32 %4, %f
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ret i32 %5
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}
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define i32 @func1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f){
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; MIPS32-LABEL: func1:
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; MIPS32: lw ${{[0-9]+}}, {{[0-9]+}}($sp)
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; MIPS32-NEXT: lw ${{[0-9]+}}, {{[0-9]+}}($sp)
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; MIPS32-NEXT: sw ${{[0-9]+}}, {{[0-9]+}}($sp)
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; MIPS32-NEXT: sw ${{[0-9]+}}, {{[0-9]+}}($sp)
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%retval = tail call i32 @func2(i32 %a, i32 %f, i32 %c, i32 %d, i32 %e, i32 %b)
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ret i32 %retval
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}
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; N64, N32 cases: N64 and N32 both pass 8 arguments in registers. The order
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; of the loads doesn't matter, but they have to become before the
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; stores
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define internal i64 @func4(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e,
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i64 %f, i64 %g, i64 %h, i64 %i, i64 %j) {
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%1 = add i64 %a, %b
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%2 = add i64 %1, %c
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%3 = add i64 %2, %d
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%4 = add i64 %3, %e
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%5 = add i64 %4, %f
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%6 = add i64 %1, %g
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%7 = add i64 %2, %h
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%8 = add i64 %3, %i
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%9 = add i64 %4, %j
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ret i64 %5
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}
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define i64 @func3(i64 %a, i64 %b, i64 %c, i64 %d,
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i64 %e, i64 %f, i64 %g, i64 %h,
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i64 %i, i64 %j){
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; MIPS64-LABEL: func3:
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; MIPS64: ld ${{[0-9]+}}, {{[0-9]+}}($sp)
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; MIPS64-NEXT: ld ${{[0-9]+}}, {{[0-9]+}}($sp)
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; MIPS64-NEXT: sd ${{[0-9]+}}, {{[0-9]+}}($sp)
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; MIPS64-NEXT: sd ${{[0-9]+}}, {{[0-9]+}}($sp)
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%retval = tail call i64 @func4(i64 %a, i64 %j, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h, i64 %i, i64 %b)
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ret i64 %retval
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}
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