forked from OSchip/llvm-project
5a87f81fe9
This lint check is a part of the FLOCL (FPGA Linters for OpenCL) project out of the Synergy Lab at Virginia Tech. FLOCL is a set of lint checks aimed at FPGA developers who write code in OpenCL. The altera unroll loops check finds inner loops that have not been unrolled, as well as fully-unrolled loops that should be partially unrolled due to unknown loop bounds or a large number of loop iterations. Based on the Altera SDK for OpenCL: Best Practices Guide. |
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| .. | ||
| Unit | ||
| clang-apply-replacements | ||
| clang-change-namespace | ||
| clang-doc | ||
| clang-include-fixer | ||
| clang-move | ||
| clang-query | ||
| clang-reorder-fields | ||
| clang-tidy | ||
| modularize | ||
| pp-trace | ||
| .clang-format | ||
| CMakeLists.txt | ||
| lit.cfg.py | ||
| lit.site.cfg.py.in | ||