llvm-project/mlir
KareemErgawy-TomTom e4dee7e730 [MLIR][SPIRV] Properly (de-)serialize BranchConditionalOp.
Implements proper (de-)serialization logic for BranchConditionalOp when
such ops have true/false target operands.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D101602
2021-05-07 09:00:50 +02:00
..
cmake/modules Move MLIR python sources to mlir/python. 2021-05-03 18:36:48 +00:00
docs Move MLIR python sources to mlir/python. 2021-05-03 18:36:48 +00:00
examples Change add_mlir_doc CMake macro to take the tablegen command as last argument to allow extra flags 2021-04-15 02:59:40 +00:00
include [mlir][linalg] Add IndexedGenericOp to GenericOp canonicalization. 2021-05-07 06:00:16 +00:00
lib [MLIR][SPIRV] Properly (de-)serialize BranchConditionalOp. 2021-05-07 09:00:50 +02:00
python Fix array attribute in bindings for linalg.init_tensor 2021-05-06 18:25:59 +02:00
test [MLIR][SPIRV] Properly (de-)serialize BranchConditionalOp. 2021-05-07 09:00:50 +02:00
tools [mlir][sparse] Introduce proper sparsification passes 2021-05-04 17:10:09 -07:00
unittests [mlir][spirv] NFC: Replace OwningSPIRVModuleRef with OwningOpRef 2021-05-06 17:17:44 -04:00
utils [mlir] Add a vscode language extension for MLIR 2021-04-21 14:44:37 -07:00
.clang-format
.clang-tidy Fix MLIR clang-tidy: when tweaking it does not inherit from the parent 2020-03-07 17:44:21 +00:00
CMakeLists.txt Move MLIR python sources to mlir/python. 2021-05-03 18:36:48 +00:00
LICENSE.TXT Add the Apache2 with LLVM exceptions license to MLIR 2019-12-24 00:58:06 -08:00
README.md mlir README.md: Fix the syntax 2019-12-24 13:31:07 +01:00

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.