llvm-project/llvm/lib/CodeGen
Kai Nacke d897a14c2e [SystemZ] Fix check for zero size when lowering memcmp.
During lowering of memcmp/bcmp, the check for a size of 0 is done
in 2 different ways. In rare cases this can lead to a crash in
SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(). The root cause
is that SelectionDAGBuilder::visitMemCmpBCmpCall() checks for a
constant int value which is not yet evaluated. When the value is
turned into a SDValue, then the evaluation is done and results in
a ConstantSDNode. But EmitTargetCodeForMemcmp() expects the special
case of 0 length to be handled, which results in an assertion.

The fix is to turn the value into a SDValue, so that both functions
use the same check.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D126900
2022-06-08 14:52:13 -04:00
..
AsmPrinter [MC] De-capitalize MCStreamer functions 2022-06-07 00:31:02 -07:00
GlobalISel [GISel] Add new combines for G_ADD 2022-06-06 11:19:45 -07:00
LiveDebugValues [DebugInfo][InstrRef] Describe value sizes when spilt to stack 2022-05-12 15:52:55 +01:00
MIRParser [MIR] Provide location of extra instruction operand when diagnosing it. 2022-05-20 05:56:25 +01:00
SelectionDAG [SystemZ] Fix check for zero size when lowering memcmp. 2022-06-08 14:52:13 -04:00
AggressiveAntiDepBreaker.cpp [llvm] Remove redundant member initialization (NFC) 2022-01-07 17:45:09 -08:00
AggressiveAntiDepBreaker.h
AllocationOrder.cpp Cleanup includes: final pass 2022-03-29 09:00:21 +02:00
AllocationOrder.h
Analysis.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
AtomicExpandPass.cpp Allow pointer types for atomicrmw xchg 2022-05-25 16:20:26 +00:00
BasicBlockSections.cpp Reland "[Propeller] Promote functions with propeller profiles to .text.hot." 2022-05-26 19:53:14 -07:00
BasicBlockSectionsProfileReader.cpp Reland "[Propeller] Promote functions with propeller profiles to .text.hot." 2022-05-26 19:53:14 -07:00
BasicTargetTransformInfo.cpp
BranchFolding.cpp BranchFolder: Require NoPHIs 2022-06-01 21:14:49 -04:00
BranchFolding.h Cleanup codegen includes 2022-03-16 08:43:00 +01:00
BranchRelaxation.cpp Cleanup includes: final pass 2022-03-29 09:00:21 +02:00
BreakFalseDeps.cpp Cleanup includes: final pass 2022-03-29 09:00:21 +02:00
CFGuardLongjmp.cpp
CFIFixup.cpp [CodeGen] Async unwind - add a pass to fix CFI information 2022-04-11 13:27:26 +01:00
CFIInstrInserter.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
CMakeLists.txt Reland "[Propeller] Promote functions with propeller profiles to .text.hot." 2022-05-26 19:53:14 -07:00
CalcSpillWeights.cpp [NFC] Expose isRematerializable and copyHint from CalcSpillWeights 2022-01-04 08:11:49 -08:00
CallingConvLower.cpp Cleanup includes: final pass 2022-03-29 09:00:21 +02:00
CodeGen.cpp [SelectOpti][1/5] Setup new select-optimize pass 2022-05-19 16:31:10 +00:00
CodeGenCommonISel.cpp Intrinsic for checking floating point class 2022-04-26 13:09:16 +07:00
CodeGenPassBuilder.cpp
CodeGenPrepare.cpp [NFC] Remove commented cerr debugging loggings 2022-06-08 15:58:06 +08:00
CommandFlags.cpp Reland "Lower `@llvm.global_dtors` using `__cxa_atexit` on MachO" 2022-03-23 18:36:55 -07:00
CriticalAntiDepBreaker.cpp [llvm] Remove redundant member initialization (NFC) 2022-01-07 17:45:09 -08:00
CriticalAntiDepBreaker.h
DFAPacketizer.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
DeadMachineInstructionElim.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
DetectDeadLanes.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
DwarfEHPrepare.cpp Reland "[ARM] __cxa_end_cleanup should be called instead of _UnwindResume." 2021-10-28 21:45:09 +02:00
EHContGuardCatchret.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
EarlyIfConversion.cpp [NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments 2022-03-16 20:25:42 +08:00
EdgeBundles.cpp
ExecutionDomainFix.cpp
ExpandMemCmp.cpp [ExpandMemCmp] Properly expand `bcmp` to an equality pattern. 2022-04-15 11:26:24 +02:00
ExpandPostRAPseudos.cpp [NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments 2022-03-16 20:25:42 +08:00
ExpandReductions.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
ExpandVectorPredication.cpp Re-land "[VP] vp intrinsics are not speculatable" with test fix 2022-05-30 14:41:15 +02:00
FEntryInserter.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
FaultMaps.cpp
FinalizeISel.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
FixupStatepointCallerSaved.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
FuncletLayout.cpp
GCMetadata.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
GCMetadataPrinter.cpp
GCRootLowering.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
GlobalMerge.cpp [llvm] Use range-based for loops (NFC) 2021-11-28 18:14:49 -08:00
HardwareLoops.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
IfConversion.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
ImplicitNullChecks.cpp [llvm] Use none_of instead of \!any_of (NFC) 2021-12-17 13:48:57 -08:00
IndirectBrExpandPass.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
InlineSpiller.cpp [LiveIntervals] Add range accessors for value numbers [nfc] 2022-05-16 08:23:12 -07:00
InterferenceCache.cpp [CodeGen] Use range-based for loops (NFC) 2021-12-03 20:45:59 -08:00
InterferenceCache.h [CodeGen] Use = default (NFC) 2022-02-06 10:54:44 -08:00
InterleavedAccessPass.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
InterleavedLoadCombinePass.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
IntrinsicLowering.cpp
JMCInstrumenter.cpp [CodeGen] Use StringRef::contains (NFC) 2022-06-04 20:58:58 -07:00
LLVMTargetMachine.cpp [llvm] Remove unneeded cl::ZeroOrMore for cl::opt options. NFC 2022-06-03 21:59:05 -07:00
LatencyPriorityQueue.cpp [llvm] Use range-based for loops (NFC) 2021-11-28 18:14:49 -08:00
LazyMachineBlockFrequencyInfo.cpp [CodeGen] Apply clang-tidy fixes for readability-redundant-smartptr-get (NFC) 2022-03-20 23:11:06 -07:00
LexicalScopes.cpp
LiveDebugVariables.cpp Reapply D124184, [DebugInfo][InstrRef] Add a size operand to DBG_PHI 2022-04-26 15:49:22 +01:00
LiveDebugVariables.h [GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues. 2021-12-05 15:55:59 -05:00
LiveInterval.cpp [CodeGen] Tweak whitespace in LiveInterval printing 2021-11-11 15:19:32 +00:00
LiveIntervalCalc.cpp Cleanup includes: final pass 2022-03-29 09:00:21 +02:00
LiveIntervalUnion.cpp [nfc][regalloc] const LiveIntervals within the allocator 2022-02-03 12:35:36 -08:00
LiveIntervals.cpp [LiveIntervals] Add range accessors for value numbers [nfc] 2022-05-16 08:23:12 -07:00
LivePhysRegs.cpp [llvm] Use llvm::reverse (NFC) 2021-11-06 19:31:18 -07:00
LiveRangeCalc.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
LiveRangeEdit.cpp [NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments 2022-03-16 20:25:42 +08:00
LiveRangeShrink.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
LiveRangeUtils.h [NFC][llvm] Inclusive language: remove instance of master in LiveRangeUtils.h 2021-11-23 13:07:42 -06:00
LiveRegMatrix.cpp [nfc][regalloc] const LiveIntervals within the allocator 2022-02-03 12:35:36 -08:00
LiveRegUnits.cpp
LiveStacks.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
LiveVariables.cpp [CodeGen] Use range-based for loops (NFC) 2021-12-03 20:45:59 -08:00
LocalStackSlotAllocation.cpp [iwyu] Handle regressions in libLLVM header include 2022-05-04 08:32:38 +02:00
LoopTraversal.cpp
LowLevelType.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
LowerEmuTLS.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MBFIWrapper.cpp
MIRCanonicalizerPass.cpp Use llvm::less_first (NFC) 2022-06-04 21:23:18 -07:00
MIRFSDiscriminator.cpp Fix warnings about variables that are set but only used in debug mode 2022-04-06 10:01:46 +03:00
MIRNamerPass.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MIRPrinter.cpp llvm-reduce: Don't assert on functions which don't track liveness 2022-06-07 10:00:25 -04:00
MIRPrintingPass.cpp
MIRSampleProfile.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MIRVRegNamerUtils.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MIRVRegNamerUtils.h
MIRYamlMapping.cpp
MLRegallocEvictAdvisor.cpp [mlgo] Support exposing more features than those supported by models 2022-05-09 18:01:21 -07:00
MachineBasicBlock.cpp [NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments 2022-03-16 20:25:42 +08:00
MachineBlockFrequencyInfo.cpp
MachineBlockPlacement.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineBranchProbabilityInfo.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineCSE.cpp MachineCSE: Report this requires SSA 2022-04-14 20:21:21 -04:00
MachineCheckDebugify.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineCombiner.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineCopyPropagation.cpp Give option to use isCopyInstr to determine which MI is 2022-05-26 18:43:16 +00:00
MachineCycleAnalysis.cpp [MachineSink] replace MachineLoop with MachineCycle 2022-05-26 06:45:23 -04:00
MachineDebugify.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineDominanceFrontier.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineDominators.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineFrameInfo.cpp
MachineFunction.cpp CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine 2022-06-01 09:45:40 -04:00
MachineFunctionPass.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineFunctionPrinterPass.cpp
MachineFunctionSplitter.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineInstr.cpp [NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments 2022-03-16 20:25:42 +08:00
MachineInstrBundle.cpp [CodeGen] Apply clang-tidy fixes for readability-redundant-smartptr-get (NFC) 2022-03-20 23:11:06 -07:00
MachineLICM.cpp [MachineLICM] Simplify code and avoid adding nullptr values to ParentMap. NFC 2022-03-15 01:24:01 -07:00
MachineLoopInfo.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineLoopUtils.cpp [ModuloSchedule] Fix terminator update when peeling. 2022-06-06 19:52:28 +00:00
MachineModuleInfo.cpp [iwyu] Handle regressions in libLLVM header include 2022-05-04 08:32:38 +02:00
MachineModuleInfoImpls.cpp
MachineModuleSlotTracker.cpp [CodeGen] Use default member initialization (NFC) 2022-01-30 12:32:51 -08:00
MachineOperand.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineOptimizationRemarkEmitter.cpp [llvm] Remove redundant member initialization (NFC) 2022-01-07 17:45:09 -08:00
MachineOutliner.cpp [llvm] Convert for_each to range-based for loops (NFC) 2022-06-05 12:07:14 -07:00
MachinePassManager.cpp
MachinePipeliner.cpp [NFC] Fix spelling/newlines in comments/debug messages 2022-06-07 09:38:53 -07:00
MachinePostDominators.cpp
MachineRegionInfo.cpp Revert "[NFC] Remove LinkAll*.h" 2021-11-02 09:08:09 -07:00
MachineRegisterInfo.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineSSAContext.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineSSAUpdater.cpp [DebugInfo] Attempt to preserve more information during tail duplication 2021-12-03 15:30:05 +00:00
MachineScheduler.cpp [CodeGen] Define ABI breaking class members correctly 2022-03-24 12:42:59 +03:00
MachineSink.cpp [MachineSink] replace MachineLoop with MachineCycle 2022-05-26 06:45:23 -04:00
MachineSizeOpts.cpp [NFC] Use Optional<ProfileCount> to model invalid counts 2021-11-14 19:03:30 -08:00
MachineStableHash.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineStripDebug.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
MachineTraceMetrics.cpp [llvm] Use llvm::reverse (NFC) 2021-12-12 16:13:49 -08:00
MachineVerifier.cpp [GlobalISel] Add G_IS_FPCLASS 2022-05-27 13:49:47 +07:00
MacroFusion.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
ModuloSchedule.cpp [NFC] Fix spelling/newlines in comments/debug messages 2022-06-07 09:38:53 -07:00
MultiHazardRecognizer.cpp
NonRelocatableStringpool.cpp [Debuginfo][DWARF][NFC] Refactor DwarfStringPoolEntryRef - remove isIndexed(). 2022-06-05 21:18:31 +03:00
OptimizePHIs.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
PHIElimination.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
PHIEliminationUtils.cpp
PHIEliminationUtils.h
ParallelCG.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
PatchableFunction.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
PeepholeOptimizer.cpp Teach PeepholeOpt to eliminate redundant copy from constant physreg (e.g VLENB on RISCV) 2022-05-16 16:38:30 -07:00
PostRAHazardRecognizer.cpp [CodeGen] Apply clang-tidy fixes for readability-redundant-smartptr-get (NFC) 2022-03-20 23:11:06 -07:00
PostRASchedulerList.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
PreISelIntrinsicLowering.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
ProcessImplicitDefs.cpp ProcessImplicitDefs: Use required properties instead of isSSA assert 2022-04-22 18:28:45 -04:00
PrologEpilogInserter.cpp [CodeGen][NFC] Move some comments from the end of lines to above them 2022-05-12 15:45:04 +01:00
PseudoProbeInserter.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
PseudoSourceValue.cpp CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine 2022-06-01 09:45:40 -04:00
RDFGraph.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RDFLiveness.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RDFRegisters.cpp
README.txt
ReachingDefAnalysis.cpp Use RegisterInfo::regsOverlaps instead of checking aliases 2022-02-26 20:32:12 +01:00
RegAllocBase.cpp RegAlloc: Fix remaining virtual registers after allocation failure 2022-04-13 16:25:30 -04:00
RegAllocBase.h [nfc][regalloc] const LiveIntervals within the allocator 2022-02-03 12:35:36 -08:00
RegAllocBasic.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RegAllocEvictionAdvisor.cpp [llvm] Remove unneeded cl::ZeroOrMore for cl::opt options. NFC 2022-06-03 21:59:05 -07:00
RegAllocEvictionAdvisor.h Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RegAllocFast.cpp [fastregalloc] Fix bug when undef value is tied to def. 2022-05-04 12:12:55 +08:00
RegAllocGreedy.cpp [CodeGen] Remove splitCanCauseEvictionChain and its helpers (NFC) 2022-06-05 20:22:47 -07:00
RegAllocGreedy.h [CodeGen] Remove splitCanCauseEvictionChain and its helpers (NFC) 2022-06-05 20:22:47 -07:00
RegAllocPBQP.cpp Fix warnings about variables that are set but only used in debug mode 2022-04-06 10:01:46 +03:00
RegAllocScore.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RegAllocScore.h Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RegUsageInfoCollector.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RegUsageInfoPropagate.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RegisterBank.cpp [nfc][codegen] Move RegisterBank[Info].h under CodeGen 2022-03-01 21:53:25 -08:00
RegisterBankInfo.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RegisterClassInfo.cpp [RegisterClassInfo] Invalidate cached information if ignoreCSRForAllocationOrder changes 2022-06-01 17:15:51 -07:00
RegisterCoalescer.cpp [NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments 2022-03-16 20:25:42 +08:00
RegisterCoalescer.h
RegisterPressure.cpp
RegisterScavenging.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RegisterUsageInfo.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RemoveRedundantDebugValues.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
RenameIndependentSubregs.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
ReplaceWithVeclib.cpp [LV][SLP] Mark fptosi_sat as vectorizable 2022-05-03 09:32:34 +01:00
ResetMachineFunctionPass.cpp
SafeStack.cpp [safestack] Support safestack in stack size diagnostics 2022-04-20 18:29:40 +00:00
SafeStackLayout.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
SafeStackLayout.h [SafeStack] Use Align instead of uint64_t 2021-12-15 14:40:56 -08:00
ScheduleDAG.cpp [llvm] Use llvm::reverse (NFC) 2021-12-12 16:13:49 -08:00
ScheduleDAGInstrs.cpp Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options 2022-06-05 00:31:44 -07:00
ScheduleDAGPrinter.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
ScoreboardHazardRecognizer.cpp [llvm] Remove redundant member initialization (NFC) 2022-01-07 17:45:09 -08:00
SelectOptimize.cpp Recommit "[SelectOpti][5/5] Optimize select-to-branch transformation" 2022-05-24 14:08:09 -04:00
ShadowStackGCLowering.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
ShrinkWrap.cpp [ShrinkWrap] check for PPC's non-callee-saved LR 2022-01-11 10:01:34 -08:00
SjLjEHPrepare.cpp [NFC] Rename Instrinsic to Intrinsic 2022-04-25 18:13:23 +01:00
SlotIndexes.cpp [CodeGen] Use default member initialization (NFC) 2022-01-30 12:32:51 -08:00
SpillPlacement.cpp
SpillPlacement.h
SplitKit.cpp Revert "[SplitKit] Handle early clobber + tied to def correctly" 2022-06-08 13:05:35 +08:00
SplitKit.h Cleanup codegen includes 2022-03-16 08:43:00 +01:00
StackColoring.cpp [StackColoring] Don't merge slots with differing StackIDs 2022-05-17 08:28:49 +01:00
StackMapLivenessAnalysis.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
StackMaps.cpp [MC] De-capitalize MCStreamer functions 2022-06-07 00:31:02 -07:00
StackProtector.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
StackSlotColoring.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
SwiftErrorValueTracking.cpp
SwitchLoweringUtils.cpp
TailDuplication.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
TailDuplicator.cpp [CodeGen] Async unwind - add a pass to fix CFI information 2022-04-11 13:27:26 +01:00
TargetFrameLoweringImpl.cpp [iwyu] Handle regressions in libLLVM header include 2022-04-13 20:53:19 +02:00
TargetInstrInfo.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
TargetLoweringBase.cpp [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4. 2022-06-02 00:49:11 +00:00
TargetLoweringObjectFileImpl.cpp [Target] Remove `startswith` for adding `SHF_EXCLUDE` to offload section 2022-06-08 09:56:51 -04:00
TargetOptionsImpl.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
TargetPassConfig.cpp Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options 2022-06-05 01:07:51 -07:00
TargetRegisterInfo.cpp Reduce dependencies on llvm/BinaryFormat/Dwarf.h 2022-02-04 11:44:03 +01:00
TargetSchedule.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
TargetSubtargetInfo.cpp [regalloc] Remove -consider-local-interval-cost 2022-03-14 10:49:16 -07:00
TwoAddressInstructionPass.cpp [TwoAddressInstructionPass] Relax assert in statepoint processing. 2022-06-01 21:34:52 +07:00
TypePromotion.cpp [iwyu] Handle regressions in libLLVM header include 2022-05-26 08:12:34 +02:00
UnreachableBlockElim.cpp [NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments 2022-03-16 20:25:42 +08:00
VLIWMachineScheduler.cpp Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options 2022-06-05 01:07:51 -07:00
ValueTypes.cpp [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4. 2022-06-02 00:49:11 +00:00
VirtRegMap.cpp [CodeGen] Use MachineInstr::operands (NFC) 2021-11-11 07:10:30 -08:00
WasmEHPrepare.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
WinEHPrepare.cpp Cleanup codegen includes 2022-03-16 08:43:00 +01:00
XRayInstrumentation.cpp Reapply [xray] add support for hexagon 2021-12-10 05:32:28 -08:00

README.txt

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str r4, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %noreg, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side
effects).  Once this is in place, it would be even better to have tblgen
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStacks analysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.