forked from OSchip/llvm-project
80 lines
2.6 KiB
LLVM
80 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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;RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s
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define <32 x i32> @test_large_vec_vaarg(i32 %n, ...) {
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; CHECK-LABEL: test_large_vec_vaarg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %ecx
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; CHECK-NEXT: cmpl $24, %ecx
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; CHECK-NEXT: jae .LBB0_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: addq %rcx, %rax
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; CHECK-NEXT: addl $8, %ecx
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; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: jmp .LBB0_3
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: movq (%rsp), %rax
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; CHECK-NEXT: addq $31, %rax
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; CHECK-NEXT: andq $-32, %rax
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; CHECK-NEXT: leaq 32(%rax), %rcx
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; CHECK-NEXT: movq %rcx, (%rsp)
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; CHECK-NEXT: .LBB0_3:
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; CHECK-NEXT: vmovaps (%rax), %ymm0
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; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %ecx
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; CHECK-NEXT: cmpl $24, %ecx
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; CHECK-NEXT: jae .LBB0_5
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; CHECK-NEXT: # %bb.4:
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; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: addq %rcx, %rax
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; CHECK-NEXT: addl $8, %ecx
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; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: jmp .LBB0_6
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; CHECK-NEXT: .LBB0_5:
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; CHECK-NEXT: movq (%rsp), %rax
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; CHECK-NEXT: addq $31, %rax
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; CHECK-NEXT: andq $-32, %rax
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; CHECK-NEXT: leaq 32(%rax), %rcx
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; CHECK-NEXT: movq %rcx, (%rsp)
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; CHECK-NEXT: .LBB0_6:
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; CHECK-NEXT: vmovaps (%rax), %ymm1
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; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %ecx
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; CHECK-NEXT: cmpl $24, %ecx
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; CHECK-NEXT: jae .LBB0_8
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; CHECK-NEXT: # %bb.7:
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; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: addq %rcx, %rax
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; CHECK-NEXT: addl $8, %ecx
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; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: jmp .LBB0_9
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; CHECK-NEXT: .LBB0_8:
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; CHECK-NEXT: movq (%rsp), %rax
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; CHECK-NEXT: addq $31, %rax
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; CHECK-NEXT: andq $-32, %rax
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; CHECK-NEXT: leaq 32(%rax), %rcx
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; CHECK-NEXT: movq %rcx, (%rsp)
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; CHECK-NEXT: .LBB0_9:
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; CHECK-NEXT: vmovaps (%rax), %ymm2
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; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %ecx
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; CHECK-NEXT: cmpl $24, %ecx
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; CHECK-NEXT: jae .LBB0_11
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; CHECK-NEXT: # %bb.10:
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; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: addq %rcx, %rax
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; CHECK-NEXT: addl $8, %ecx
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; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps (%rax), %ymm3
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB0_11:
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; CHECK-NEXT: movq (%rsp), %rax
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; CHECK-NEXT: addq $31, %rax
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; CHECK-NEXT: andq $-32, %rax
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; CHECK-NEXT: leaq 32(%rax), %rcx
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; CHECK-NEXT: movq %rcx, (%rsp)
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; CHECK-NEXT: vmovaps (%rax), %ymm3
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; CHECK-NEXT: retq
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%args = alloca i8*, align 4
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%x = va_arg i8** %args, <32 x i32>
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ret <32 x i32> %x
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}
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