forked from OSchip/llvm-project
144 lines
5.4 KiB
C
144 lines
5.4 KiB
C
// Check -fsanitize=signed-integer-overflow and
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// -fsanitize=unsigned-integer-overflow with promoted unsigned types
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//
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// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s \
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// RUN: -fsanitize=signed-integer-overflow | FileCheck %s --check-prefix=CHECKS
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// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s \
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// RUN: -fsanitize=unsigned-integer-overflow | FileCheck %s --check-prefix=CHECKU
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unsigned short si, sj, sk;
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unsigned char ci, cj, ck;
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extern void opaqueshort(unsigned short);
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extern void opaquechar(unsigned char);
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// CHECKS-LABEL: define void @testshortadd()
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// CHECKU-LABEL: define void @testshortadd()
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void testshortadd() {
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// CHECKS: load i16, i16* @sj
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// CHECKS: load i16, i16* @sk
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// CHECKS: [[T1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
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// CHECKS-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
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// CHECKS-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
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// CHECKS: call void @__ubsan_handle_add_overflow
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//
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// CHECKU: [[T1:%.*]] = load i16, i16* @sj
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// CHECKU: [[T2:%.*]] = zext i16 [[T1]]
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// CHECKU: [[T3:%.*]] = load i16, i16* @sk
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// CHECKU: [[T4:%.*]] = zext i16 [[T3]]
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// CHECKU-NOT: llvm.sadd
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// CHECKU-NOT: llvm.uadd
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// CHECKU: [[T5:%.*]] = add nsw i32 [[T2]], [[T4]]
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si = sj + sk;
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}
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// CHECKS-LABEL: define void @testshortsub()
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// CHECKU-LABEL: define void @testshortsub()
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void testshortsub() {
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// CHECKS: load i16, i16* @sj
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// CHECKS: load i16, i16* @sk
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// CHECKS: [[T1:%.*]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
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// CHECKS-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
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// CHECKS-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
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// CHECKS: call void @__ubsan_handle_sub_overflow
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//
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// CHECKU: [[T1:%.*]] = load i16, i16* @sj
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// CHECKU: [[T2:%.*]] = zext i16 [[T1]]
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// CHECKU: [[T3:%.*]] = load i16, i16* @sk
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// CHECKU: [[T4:%.*]] = zext i16 [[T3]]
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// CHECKU-NOT: llvm.ssub
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// CHECKU-NOT: llvm.usub
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// CHECKU: [[T5:%.*]] = sub nsw i32 [[T2]], [[T4]]
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si = sj - sk;
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}
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// CHECKS-LABEL: define void @testshortmul()
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// CHECKU-LABEL: define void @testshortmul()
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void testshortmul() {
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// CHECKS: load i16, i16* @sj
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// CHECKS: load i16, i16* @sk
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// CHECKS: [[T1:%.*]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
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// CHECKS-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
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// CHECKS-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
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// CHECKS: call void @__ubsan_handle_mul_overflow
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//
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// CHECKU: [[T1:%.*]] = load i16, i16* @sj
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// CHECKU: [[T2:%.*]] = zext i16 [[T1]]
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// CHECKU: [[T3:%.*]] = load i16, i16* @sk
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// CHECKU: [[T4:%.*]] = zext i16 [[T3]]
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// CHECKU-NOT: llvm.smul
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// CHECKU-NOT: llvm.umul
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// CHECKU: [[T5:%.*]] = mul nsw i32 [[T2]], [[T4]]
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si = sj * sk;
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}
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// CHECKS-LABEL: define void @testcharadd()
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// CHECKU-LABEL: define void @testcharadd()
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void testcharadd() {
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// CHECKS: load i8, i8* @cj
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// CHECKS: load i8, i8* @ck
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// CHECKS: [[T1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
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// CHECKS-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
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// CHECKS-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
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// CHECKS: call void @__ubsan_handle_add_overflow
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//
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// CHECKU: [[T1:%.*]] = load i8, i8* @cj
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// CHECKU: [[T2:%.*]] = zext i8 [[T1]]
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// CHECKU: [[T3:%.*]] = load i8, i8* @ck
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// CHECKU: [[T4:%.*]] = zext i8 [[T3]]
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// CHECKU-NOT: llvm.sadd
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// CHECKU-NOT: llvm.uadd
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// CHECKU: [[T5:%.*]] = add nsw i32 [[T2]], [[T4]]
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ci = cj + ck;
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}
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// CHECKS-LABEL: define void @testcharsub()
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// CHECKU-LABEL: define void @testcharsub()
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void testcharsub() {
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// CHECKS: load i8, i8* @cj
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// CHECKS: load i8, i8* @ck
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// CHECKS: [[T1:%.*]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
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// CHECKS-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
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// CHECKS-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
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// CHECKS: call void @__ubsan_handle_sub_overflow
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//
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// CHECKU: [[T1:%.*]] = load i8, i8* @cj
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// CHECKU: [[T2:%.*]] = zext i8 [[T1]]
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// CHECKU: [[T3:%.*]] = load i8, i8* @ck
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// CHECKU: [[T4:%.*]] = zext i8 [[T3]]
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// CHECKU-NOT: llvm.ssub
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// CHECKU-NOT: llvm.usub
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// CHECKU: [[T5:%.*]] = sub nsw i32 [[T2]], [[T4]]
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ci = cj - ck;
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}
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// CHECKS-LABEL: define void @testcharmul()
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// CHECKU-LABEL: define void @testcharmul()
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void testcharmul() {
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// CHECKS: load i8, i8* @cj
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// CHECKS: load i8, i8* @ck
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// CHECKS: [[T1:%.*]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
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// CHECKS-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
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// CHECKS-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
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// CHECKS: call void @__ubsan_handle_mul_overflow
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//
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// CHECKU: [[T1:%.*]] = load i8, i8* @cj
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// CHECKU: [[T2:%.*]] = zext i8 [[T1]]
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// CHECKU: [[T3:%.*]] = load i8, i8* @ck
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// CHECKU: [[T4:%.*]] = zext i8 [[T3]]
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// CHECKU-NOT: llvm.smul
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// CHECKU-NOT: llvm.umul
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// CHECKU: [[T5:%.*]] = mul nsw i32 [[T2]], [[T4]]
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ci = cj * ck;
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}
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