forked from OSchip/llvm-project
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
// RUN: %clang_cc1 -O1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -S -o - -emit-llvm %s | FileCheck %s
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// Test ARM64 SIMD fused multiply add intrinsics
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#include <arm_neon.h>
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int64x2_t test_vabsq_s64(int64x2_t a1) {
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// CHECK: test_vabsq_s64
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return vabsq_s64(a1);
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// CHECK: llvm.aarch64.neon.abs.v2i64
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// CHECK-NEXT: ret
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}
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int64_t test_vceqd_s64(int64_t a1, int64_t a2) {
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// CHECK: test_vceqd_s64
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return vceqd_s64(a1, a2);
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// CHECK: [[BIT:%[0-9a-zA-Z.]+]] = icmp eq i64 %a1, %a2
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// CHECK: sext i1 [[BIT]] to i64
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}
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int64_t test_vceqd_f64(float64_t a1, float64_t a2) {
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// CHECK: test_vceqd_f64
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return vceqd_f64(a1, a2);
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// CHECK: [[BIT:%[0-9a-zA-Z.]+]] = fcmp oeq double %a1, %a2
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// CHECK: sext i1 [[BIT]] to i64
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}
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uint64_t test_vcgtd_u64(uint64_t a1, uint64_t a2) {
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// CHECK: test_vcgtd_u64
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return vcgtd_u64(a1, a2);
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// CHECK: [[BIT:%[0-9a-zA-Z.]+]] = icmp ugt i64 %a1, %a2
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// CHECK: sext i1 [[BIT]] to i64
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}
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uint64_t test_vcled_u64(uint64_t a1, uint64_t a2) {
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// CHECK: test_vcled_u64
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return vcled_u64(a1, a2);
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// CHECK: [[BIT:%[0-9a-zA-Z.]+]] = icmp ule i64 %a1, %a2
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// CHECK: sext i1 [[BIT]] to i64
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}
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int64_t test_vceqzd_s64(int64_t a1) {
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// CHECK: test_vceqzd_s64
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return vceqzd_s64(a1);
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// CHECK: [[BIT:%[0-9a-zA-Z.]+]] = icmp eq i64 %a1, 0
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// CHECK: sext i1 [[BIT]] to i64
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}
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uint64x2_t test_vceqq_u64(uint64x2_t a1, uint64x2_t a2) {
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// CHECK: test_vceqq_u64
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return vceqq_u64(a1, a2);
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// CHECK: icmp eq <2 x i64> %a1, %a2
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}
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uint64x2_t test_vcgeq_s64(int64x2_t a1, int64x2_t a2) {
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// CHECK: test_vcgeq_s64
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return vcgeq_s64(a1, a2);
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// CHECK: icmp sge <2 x i64> %a1, %a2
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}
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uint64x2_t test_vcgeq_u64(uint64x2_t a1, uint64x2_t a2) {
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// CHECK: test_vcgeq_u64
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return vcgeq_u64(a1, a2);
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// CHECK: icmp uge <2 x i64> %a1, %a2
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}
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uint64x2_t test_vcgtq_s64(int64x2_t a1, int64x2_t a2) {
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// CHECK: test_vcgtq_s64
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return vcgtq_s64(a1, a2);
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// CHECK: icmp sgt <2 x i64> %a1, %a2
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}
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uint64x2_t test_vcgtq_u64(uint64x2_t a1, uint64x2_t a2) {
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// CHECK: test_vcgtq_u64
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return vcgtq_u64(a1, a2);
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// CHECK: icmp ugt <2 x i64> %a1, %a2
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}
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uint64x2_t test_vcleq_s64(int64x2_t a1, int64x2_t a2) {
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// CHECK: test_vcleq_s64
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return vcleq_s64(a1, a2);
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// CHECK: icmp sle <2 x i64> %a1, %a2
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}
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uint64x2_t test_vcleq_u64(uint64x2_t a1, uint64x2_t a2) {
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// CHECK: test_vcleq_u64
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return vcleq_u64(a1, a2);
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// CHECK: icmp ule <2 x i64> %a1, %a2
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}
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uint64x2_t test_vcltq_s64(int64x2_t a1, int64x2_t a2) {
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// CHECK: test_vcltq_s64
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return vcltq_s64(a1, a2);
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// CHECK: icmp slt <2 x i64> %a1, %a2
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}
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uint64x2_t test_vcltq_u64(uint64x2_t a1, uint64x2_t a2) {
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// CHECK: test_vcltq_u64
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return vcltq_u64(a1, a2);
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// CHECK: icmp ult <2 x i64> %a1, %a2
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}
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int64x2_t test_vqabsq_s64(int64x2_t a1) {
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// CHECK: test_vqabsq_s64
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return vqabsq_s64(a1);
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// CHECK: llvm.aarch64.neon.sqabs.v2i64(<2 x i64> %a1)
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// CHECK-NEXT: ret
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}
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