forked from OSchip/llvm-project
513 lines
16 KiB
YAML
513 lines
16 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple thumbv8m.base-none-eabi -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s
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--- |
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv8m.base-none-none-eabi"
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define i32 @test_adc(i32 %a, i32 %b) { ret i32 %a }
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define i32 @test_adc_mov(i32 %a, i32 %b) { ret i32 %a }
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define i32 @test_sbc(i32 %a, i32 %b) { ret i32 %a }
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define i32 @test_rsb(i32 %a) { ret i32 %a }
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define i32 @test_and(i32 %a, i32 %b) { ret i32 %a }
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define i32 @test_orr(i32 %a, i32 %b) { ret i32 %a }
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define i32 @test_eor(i32 %a, i32 %b) { ret i32 %a }
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define i32 @test_bic(i32 %a, i32 %b) { ret i32 %a }
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define i32 @test_mvn(i32 %a) { ret i32 %a }
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define i32 @test_asrrr(i32 %a, i32 %b) { ret i32 %a }
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define i32 @test_asrri(i32 %a) { ret i32 %a }
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define i32 @test_ror(i32 %a, i32 %b) { ret i32 %a }
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...
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---
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name: test_adc
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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- { reg: '$r1', virtual-reg: '%1' }
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body: |
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; CHECK-LABEL: name: test_adc
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
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; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: %3:tgpr, $cpsr = tADC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg, implicit $cpsr
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY1]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %4:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %3
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
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%1:tgpr = COPY $r1
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%0:tgpr = COPY $r0
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%3:tgpr, $cpsr = tADDrr %0, %1, 14, $noreg
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%2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr
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tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 1, $cpsr
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tB %bb.1, 14, $noreg
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bb.1:
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$r0 = COPY %0
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tBX_RET 14, $noreg, implicit $r0
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bb.2:
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%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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$r0 = COPY %2
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tBX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_adc_mov
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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- { reg: '$r1', virtual-reg: '%1' }
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body: |
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; CHECK-LABEL: name: test_adc_mov
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
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; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: %3:tgpr, dead $cpsr = tADC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg, implicit $cpsr
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; CHECK: %4:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tCMPi8 %3, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY1]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %5:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %3
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
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%1:tgpr = COPY $r1
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%0:tgpr = COPY $r0
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%3:tgpr, $cpsr = tADDrr %0, %1, 14, $noreg
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%2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr
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%5:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 1, $cpsr
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tB %bb.1, 14, $noreg
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bb.1:
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$r0 = COPY %0
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tBX_RET 14, $noreg, implicit $r0
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bb.2:
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%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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$r0 = COPY %2
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tBX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_sbc
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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- { reg: '$r1', virtual-reg: '%1' }
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body: |
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; CHECK-LABEL: name: test_sbc
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
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; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: %3:tgpr, $cpsr = tSBC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg, implicit $cpsr
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY1]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %4:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %3
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
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%1:tgpr = COPY $r1
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%0:tgpr = COPY $r0
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%3:tgpr, $cpsr = tADDrr %0, %1, 14, $noreg
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%2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr
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tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 1, $cpsr
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tB %bb.1, 14, $noreg
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bb.1:
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$r0 = COPY %0
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tBX_RET 14, $noreg, implicit $r0
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bb.2:
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%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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$r0 = COPY %2
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tBX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_rsb
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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body: |
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; CHECK-LABEL: name: test_rsb
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %1:tgpr, $cpsr = tRSB [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %1
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
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%0:tgpr = COPY $r0
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%1:tgpr, dead $cpsr = tRSB %0, 14, $noreg
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tCMPi8 %1, 0, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 1, $cpsr
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tB %bb.1, 14, $noreg
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bb.1:
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$r0 = COPY %0
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tBX_RET 14, $noreg, implicit $r0
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bb.2:
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%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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$r0 = COPY %1
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tBX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_and
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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- { reg: '$r1', virtual-reg: '%1' }
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body: |
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; CHECK-LABEL: name: test_and
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
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; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %2:tgpr, $cpsr = tAND [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY1]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %2
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
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%1:tgpr = COPY $r1
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%0:tgpr = COPY $r0
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%2:tgpr, dead $cpsr = tAND %0, %1, 14, $noreg
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tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 1, $cpsr
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tB %bb.1, 14, $noreg
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bb.1:
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$r0 = COPY %0
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tBX_RET 14, $noreg, implicit $r0
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bb.2:
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%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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$r0 = COPY %2
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tBX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_orr
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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- { reg: '$r1', virtual-reg: '%1' }
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body: |
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; CHECK-LABEL: name: test_orr
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
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; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %2:tgpr, $cpsr = tORR [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY1]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %2
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
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%1:tgpr = COPY $r1
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%0:tgpr = COPY $r0
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%2:tgpr, dead $cpsr = tORR %0, %1, 14, $noreg
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tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 1, $cpsr
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tB %bb.1, 14, $noreg
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bb.1:
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$r0 = COPY %0
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tBX_RET 14, $noreg, implicit $r0
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bb.2:
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%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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$r0 = COPY %2
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tBX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_eor
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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- { reg: '$r1', virtual-reg: '%1' }
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body: |
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; CHECK-LABEL: name: test_eor
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
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; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %2:tgpr, $cpsr = tEOR [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY1]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %2
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
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%1:tgpr = COPY $r1
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%0:tgpr = COPY $r0
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%2:tgpr, dead $cpsr = tEOR %0, %1, 14, $noreg
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tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 1, $cpsr
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tB %bb.1, 14, $noreg
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bb.1:
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$r0 = COPY %0
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tBX_RET 14, $noreg, implicit $r0
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bb.2:
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%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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$r0 = COPY %2
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tBX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_bic
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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- { reg: '$r1', virtual-reg: '%1' }
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body: |
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; CHECK-LABEL: name: test_bic
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
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; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %2:tgpr, $cpsr = tBIC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY1]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %2
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
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%1:tgpr = COPY $r1
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%0:tgpr = COPY $r0
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%2:tgpr, dead $cpsr = tBIC %0, %1, 14, $noreg
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tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 1, $cpsr
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tB %bb.1, 14, $noreg
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bb.1:
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$r0 = COPY %0
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tBX_RET 14, $noreg, implicit $r0
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bb.2:
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%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
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$r0 = COPY %2
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tBX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_mvn
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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body: |
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; CHECK-LABEL: name: test_mvn
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0
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; CHECK: %1:tgpr, $cpsr = tMVN [[COPY]], 14 /* CC::al */, $noreg
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; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
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; CHECK: bb.1:
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; CHECK: $r0 = COPY [[COPY]]
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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; CHECK: bb.2:
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; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: $r0 = COPY %1
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.0:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $r0, $r1
|
|
|
|
%0:tgpr = COPY $r0
|
|
%1:tgpr, dead $cpsr = tMVN %0, 14, $noreg
|
|
tCMPi8 %1, 0, 14, $noreg, implicit-def $cpsr
|
|
tBcc %bb.2, 1, $cpsr
|
|
tB %bb.1, 14, $noreg
|
|
|
|
bb.1:
|
|
$r0 = COPY %0
|
|
tBX_RET 14, $noreg, implicit $r0
|
|
|
|
bb.2:
|
|
%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
|
|
$r0 = COPY %1
|
|
tBX_RET 14, $noreg, implicit $r0
|
|
...
|
|
---
|
|
name: test_asrrr
|
|
liveins:
|
|
- { reg: '$r0', virtual-reg: '%0' }
|
|
- { reg: '$r1', virtual-reg: '%1' }
|
|
body: |
|
|
; CHECK-LABEL: name: test_asrrr
|
|
; CHECK: bb.0:
|
|
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
|
|
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
|
|
; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
|
|
; CHECK: %2:tgpr, $cpsr = tASRrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
|
|
; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
|
|
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
|
|
; CHECK: bb.1:
|
|
; CHECK: $r0 = COPY [[COPY1]]
|
|
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
; CHECK: bb.2:
|
|
; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
|
|
; CHECK: $r0 = COPY %2
|
|
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
bb.0:
|
|
successors: %bb.2(0x40000000), %bb.1(0x40000000)
|
|
liveins: $r0, $r1
|
|
|
|
%1:tgpr = COPY $r1
|
|
%0:tgpr = COPY $r0
|
|
%2:tgpr, dead $cpsr = tASRrr %0, %1, 14, $noreg
|
|
tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
|
|
tBcc %bb.2, 1, $cpsr
|
|
tB %bb.1, 14, $noreg
|
|
|
|
bb.1:
|
|
$r0 = COPY %0
|
|
tBX_RET 14, $noreg, implicit $r0
|
|
|
|
bb.2:
|
|
%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
|
|
$r0 = COPY %2
|
|
tBX_RET 14, $noreg, implicit $r0
|
|
...
|
|
---
|
|
name: test_asrri
|
|
liveins:
|
|
- { reg: '$r0', virtual-reg: '%0' }
|
|
body: |
|
|
; CHECK-LABEL: name: test_asrri
|
|
; CHECK: bb.0:
|
|
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
|
|
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0
|
|
; CHECK: %1:tgpr, $cpsr = tASRri [[COPY]], 1, 14 /* CC::al */, $noreg
|
|
; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
|
|
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
|
|
; CHECK: bb.1:
|
|
; CHECK: $r0 = COPY [[COPY]]
|
|
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
; CHECK: bb.2:
|
|
; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
|
|
; CHECK: $r0 = COPY %1
|
|
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
bb.0:
|
|
successors: %bb.2(0x40000000), %bb.1(0x40000000)
|
|
liveins: $r0, $r1
|
|
|
|
%0:tgpr = COPY $r0
|
|
%2:tgpr, dead $cpsr = tASRri %0, 1, 14, $noreg
|
|
tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
|
|
tBcc %bb.2, 1, $cpsr
|
|
tB %bb.1, 14, $noreg
|
|
|
|
bb.1:
|
|
$r0 = COPY %0
|
|
tBX_RET 14, $noreg, implicit $r0
|
|
|
|
bb.2:
|
|
%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
|
|
$r0 = COPY %2
|
|
tBX_RET 14, $noreg, implicit $r0
|
|
...
|
|
---
|
|
name: test_ror
|
|
liveins:
|
|
- { reg: '$r0', virtual-reg: '%0' }
|
|
- { reg: '$r1', virtual-reg: '%1' }
|
|
body: |
|
|
; CHECK-LABEL: name: test_ror
|
|
; CHECK: bb.0:
|
|
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
|
|
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
|
|
; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
|
|
; CHECK: %2:tgpr, $cpsr = tROR [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
|
|
; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr
|
|
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
|
|
; CHECK: bb.1:
|
|
; CHECK: $r0 = COPY [[COPY1]]
|
|
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
; CHECK: bb.2:
|
|
; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
|
|
; CHECK: $r0 = COPY %2
|
|
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
bb.0:
|
|
successors: %bb.2(0x40000000), %bb.1(0x40000000)
|
|
liveins: $r0, $r1
|
|
|
|
%1:tgpr = COPY $r1
|
|
%0:tgpr = COPY $r0
|
|
%2:tgpr, dead $cpsr = tROR %0, %1, 14, $noreg
|
|
tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr
|
|
tBcc %bb.2, 1, $cpsr
|
|
tB %bb.1, 14, $noreg
|
|
|
|
bb.1:
|
|
$r0 = COPY %0
|
|
tBX_RET 14, $noreg, implicit $r0
|
|
|
|
bb.2:
|
|
%4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
|
|
$r0 = COPY %2
|
|
tBX_RET 14, $noreg, implicit $r0
|
|
...
|