forked from OSchip/llvm-project
66 lines
1.4 KiB
LLVM
66 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs < %s | FileCheck --check-prefix=T1 %s
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; RUN: llc -mtriple=thumbv7m-eabi -verify-machineinstrs < %s | FileCheck --check-prefix=T2 %s
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define i32 @addri1(i32 %a, i32 %b) {
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; T1-LABEL: addri1:
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; T1: @ %bb.0: @ %entry
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; T1-NEXT: adds r0, r0, #3
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; T1-NEXT: beq .LBB0_2
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; T1-NEXT: @ %bb.1: @ %false
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; T1-NEXT: movs r0, #5
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; T1-NEXT: bx lr
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; T1-NEXT: .LBB0_2: @ %true
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; T1-NEXT: movs r0, #4
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; T1-NEXT: bx lr
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;
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; T2-LABEL: addri1:
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; T2: @ %bb.0: @ %entry
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; T2-NEXT: adds r0, #3
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; T2-NEXT: mov.w r0, #5
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; T2-NEXT: it eq
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; T2-NEXT: moveq r0, #4
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; T2-NEXT: bx lr
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entry:
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%c = add i32 %a, 3
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%d = icmp eq i32 %c, 0
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br i1 %d, label %true, label %false
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true:
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ret i32 4
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false:
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ret i32 5
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}
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define i32 @addri2(i32 %a, i32 %b) {
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; T1-LABEL: addri2:
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; T1: @ %bb.0: @ %entry
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; T1-NEXT: adds r0, #254
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; T1-NEXT: beq .LBB1_2
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; T1-NEXT: @ %bb.1: @ %false
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; T1-NEXT: movs r0, #5
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; T1-NEXT: bx lr
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; T1-NEXT: .LBB1_2: @ %true
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; T1-NEXT: movs r0, #4
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; T1-NEXT: bx lr
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;
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; T2-LABEL: addri2:
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; T2: @ %bb.0: @ %entry
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; T2-NEXT: adds r0, #254
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; T2-NEXT: mov.w r0, #5
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; T2-NEXT: it eq
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; T2-NEXT: moveq r0, #4
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; T2-NEXT: bx lr
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entry:
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%c = add i32 %a, 254
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%d = icmp eq i32 %c, 0
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br i1 %d, label %true, label %false
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true:
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ret i32 4
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false:
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ret i32 5
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}
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