forked from OSchip/llvm-project
438 lines
19 KiB
LLVM
438 lines
19 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mattr=harden-sls-retbr -mattr=harden-sls-blr -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT,ISBDSB -dump-input-context=100
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; RUN: llc -mattr=harden-sls-retbr -mattr=harden-sls-blr -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT,ISBDSB -dump-input-context=100
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; RUN: llc -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=+sb -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT,SB -dump-input-context=100
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; RUN: llc -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=+sb -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT,SB -dump-input-context=100
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; RUN: llc -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=harden-sls-nocomdat -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT-OFF,ISBDSB -dump-input-context=100
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; RUN: llc -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=harden-sls-nocomdat -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT-OFF,ISBDSB -dump-input-context=100
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; RUN: llc -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=harden-sls-nocomdat -mattr=+sb -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT-OFF,SB -dump-input-context=100
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; RUN: llc -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=harden-sls-nocomdat -mattr=+sb -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT-OFF,SB -dump-input-context=100
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; RUN: llc -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=NOHARDENARM -dump-input-context=100
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; RUN: llc -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=NOHARDENTHUMB
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; RUN: llc -global-isel -global-isel-abort=0 -mattr=harden-sls-retbr -mattr=harden-sls-blr -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT,ISBDSB
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; RUN: llc -global-isel -global-isel-abort=0 -mattr=harden-sls-retbr -mattr=harden-sls-blr -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT,ISBDSB
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; RUN: llc -global-isel -global-isel-abort=0 -mattr=harden-sls-retbr -mattr=harden-sls-nocomdat -mattr=harden-sls-blr -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT-OFF,ISBDSB
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; RUN: llc -global-isel -global-isel-abort=0 -mattr=harden-sls-retbr -mattr=harden-sls-nocomdat -mattr=harden-sls-blr -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT-OFF,ISBDSB
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; RUN: llc -global-isel -global-isel-abort=0 -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=+sb -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,SB
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; RUN: llc -global-isel -global-isel-abort=0 -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=+sb -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,SB
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; RUN: llc -fast-isel -mattr=harden-sls-retbr -mattr=harden-sls-blr -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT,ISBDSB
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; RUN: llc -fast-isel -mattr=harden-sls-retbr -mattr=harden-sls-blr -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT,ISBDSB
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; RUN: llc -fast-isel -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=harden-sls-nocomdat -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT-OFF,ISBDSB
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; RUN: llc -fast-isel -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=harden-sls-nocomdat -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,HARDEN-COMDAT-OFF,ISBDSB
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; RUN: llc -fast-isel -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=+sb -verify-machineinstrs -mtriple=armv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,SB
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; RUN: llc -fast-isel -mattr=harden-sls-retbr -mattr=harden-sls-blr -mattr=+sb -verify-machineinstrs -mtriple=thumbv8-linux-gnueabi < %s | FileCheck %s --check-prefixes=HARDEN,SB
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; Function Attrs: norecurse nounwind readnone
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define dso_local i32 @double_return(i32 %a, i32 %b) local_unnamed_addr {
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; NOHARDENARM-LABEL: double_return:
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; NOHARDENARM: @ %bb.0: @ %entry
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; NOHARDENARM-NEXT: cmp r0, #0
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; NOHARDENARM-NEXT: mulgt r0, r1, r0
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; NOHARDENARM-NEXT: bxgt lr
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; NOHARDENARM-NEXT: .LBB0_1: @ %if.else
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; NOHARDENARM-NEXT: sdiv r1, r0, r1
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; NOHARDENARM-NEXT: sdiv r1, r0, r1
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; NOHARDENARM-NEXT: sdiv r0, r0, r1
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; NOHARDENARM-NEXT: bx lr
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;
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; NOHARDENTHUMB-LABEL: double_return:
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; NOHARDENTHUMB: @ %bb.0: @ %entry
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; NOHARDENTHUMB-NEXT: cmp r0, #0
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; NOHARDENTHUMB-NEXT: ble .LBB0_2
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; NOHARDENTHUMB-NEXT: @ %bb.1: @ %if.then
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; NOHARDENTHUMB-NEXT: muls r0, r1, r0
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; NOHARDENTHUMB-NEXT: bx lr
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; NOHARDENTHUMB-NEXT: .LBB0_2: @ %if.else
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; NOHARDENTHUMB-NEXT: sdiv r1, r0, r1
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; NOHARDENTHUMB-NEXT: sdiv r1, r0, r1
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; NOHARDENTHUMB-NEXT: sdiv r0, r0, r1
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; NOHARDENTHUMB-NEXT: bx lr
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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; Make a very easy, very likely to predicate return (BX LR), to test that
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; it will not get predicated when sls-hardening is enabled.
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%mul = mul i32 %b, %a
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ret i32 %mul
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if.else: ; preds = %entry
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%div3 = sdiv i32 %a, %b
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%div2 = sdiv i32 %a, %div3
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%div1 = sdiv i32 %a, %div2
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ret i32 %div1
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}
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@__const.indirect_branch.ptr = private unnamed_addr constant [2 x i8*] [i8* blockaddress(@indirect_branch, %return), i8* blockaddress(@indirect_branch, %l2)], align 8
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; Function Attrs: norecurse nounwind readnone
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define dso_local i32 @indirect_branch(i32 %a, i32 %b, i32 %i) {
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; NOHARDENARM-LABEL: indirect_branch:
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; NOHARDENARM: @ %bb.0: @ %entry
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; NOHARDENARM-NEXT: movw r0, :lower16:.L__const.indirect_branch.ptr
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; NOHARDENARM-NEXT: movt r0, :upper16:.L__const.indirect_branch.ptr
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; NOHARDENARM-NEXT: ldr r0, [r0, r2, lsl #2]
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; NOHARDENARM-NEXT: bx r0
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; NOHARDENARM-NEXT: .Ltmp0: @ Block address taken
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; NOHARDENARM-NEXT: .LBB1_1: @ %return
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; NOHARDENARM-NEXT: mov r0, #0
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; NOHARDENARM-NEXT: bx lr
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; NOHARDENARM-NEXT: .Ltmp1: @ Block address taken
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; NOHARDENARM-NEXT: .LBB1_2: @ %l2
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; NOHARDENARM-NEXT: mov r0, #1
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; NOHARDENARM-NEXT: bx lr
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;
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; NOHARDENTHUMB-LABEL: indirect_branch:
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; NOHARDENTHUMB: @ %bb.0: @ %entry
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; NOHARDENTHUMB-NEXT: movw r0, :lower16:.L__const.indirect_branch.ptr
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; NOHARDENTHUMB-NEXT: movt r0, :upper16:.L__const.indirect_branch.ptr
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; NOHARDENTHUMB-NEXT: ldr.w r0, [r0, r2, lsl #2]
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; NOHARDENTHUMB-NEXT: mov pc, r0
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; NOHARDENTHUMB-NEXT: .Ltmp0: @ Block address taken
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; NOHARDENTHUMB-NEXT: .LBB1_1: @ %return
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; NOHARDENTHUMB-NEXT: movs r0, #0
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; NOHARDENTHUMB-NEXT: bx lr
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; NOHARDENTHUMB-NEXT: .Ltmp1: @ Block address taken
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; NOHARDENTHUMB-NEXT: .LBB1_2: @ %l2
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; NOHARDENTHUMB-NEXT: movs r0, #1
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; NOHARDENTHUMB-NEXT: bx lr
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entry:
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @__const.indirect_branch.ptr, i64 0, i64 %idxprom
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%0 = load i8*, i8** %arrayidx, align 8
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indirectbr i8* %0, [label %return, label %l2]
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l2: ; preds = %entry
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br label %return
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return: ; preds = %entry, %l2
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%retval.0 = phi i32 [ 1, %l2 ], [ 0, %entry ]
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ret i32 %retval.0
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}
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define i32 @asmgoto() {
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; NOHARDENARM-LABEL: asmgoto:
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; NOHARDENARM: @ %bb.0: @ %entry
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; NOHARDENARM-NEXT: mov r0, #0
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; NOHARDENARM-NEXT: @APP
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; NOHARDENARM-NEXT: b .Ltmp2
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; NOHARDENARM-NEXT: @NO_APP
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; NOHARDENARM-NEXT: @ %bb.1: @ %common.ret
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; NOHARDENARM-NEXT: bx lr
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; NOHARDENARM-NEXT: .Ltmp2: @ Block address taken
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; NOHARDENARM-NEXT: .LBB2_2: @ %d
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; NOHARDENARM-NEXT: mov r0, #1
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; NOHARDENARM-NEXT: bx lr
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;
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; NOHARDENTHUMB-LABEL: asmgoto:
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; NOHARDENTHUMB: @ %bb.0: @ %entry
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; NOHARDENTHUMB-NEXT: @APP
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; NOHARDENTHUMB-NEXT: b .Ltmp2
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; NOHARDENTHUMB-NEXT: @NO_APP
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; NOHARDENTHUMB-NEXT: @ %bb.1:
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; NOHARDENTHUMB-NEXT: movs r0, #0
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; NOHARDENTHUMB-NEXT: bx lr
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; NOHARDENTHUMB-NEXT: .Ltmp2: @ Block address taken
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; NOHARDENTHUMB-NEXT: .LBB2_2: @ %d
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; NOHARDENTHUMB-NEXT: movs r0, #1
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; NOHARDENTHUMB-NEXT: bx lr
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entry:
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callbr void asm sideeffect "B $0", "X"(i8* blockaddress(@asmgoto, %d))
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to label %asm.fallthrough [label %d]
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; The asm goto above produces a direct branch:
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; For direct branches, no mitigation is needed.
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; ISDDSB-NOT: dsb sy
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asm.fallthrough: ; preds = %entry
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ret i32 0
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d: ; preds = %asm.fallthrough, %entry
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ret i32 1
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}
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; Check that indirect branches produced through switch jump tables are also
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; hardened:
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define dso_local i32 @jumptable(i32 %a, i32 %b) {
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; NOHARDENARM-LABEL: jumptable:
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; NOHARDENARM: @ %bb.0: @ %entry
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; NOHARDENARM-NEXT: cmp r1, #4
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; NOHARDENARM-NEXT: bxhi lr
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; NOHARDENARM-NEXT: .LBB3_1: @ %entry
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; NOHARDENARM-NEXT: adr r2, .LJTI3_0
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; NOHARDENARM-NEXT: ldr pc, [r2, r1, lsl #2]
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; NOHARDENARM-NEXT: @ %bb.2:
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; NOHARDENARM-NEXT: .p2align 2
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; NOHARDENARM-NEXT: .LJTI3_0:
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; NOHARDENARM-NEXT: .long .LBB3_3
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; NOHARDENARM-NEXT: .long .LBB3_4
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; NOHARDENARM-NEXT: .long .LBB3_7
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; NOHARDENARM-NEXT: .long .LBB3_5
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; NOHARDENARM-NEXT: .long .LBB3_6
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; NOHARDENARM-NEXT: .LBB3_3: @ %sw.bb
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; NOHARDENARM-NEXT: lsl r0, r0, #1
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; NOHARDENARM-NEXT: .LBB3_4: @ %sw.bb1
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; NOHARDENARM-NEXT: lsl r0, r0, #1
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; NOHARDENARM-NEXT: .LBB3_5: @ %sw.bb3
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; NOHARDENARM-NEXT: lsl r0, r0, #1
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; NOHARDENARM-NEXT: .LBB3_6: @ %sw.bb5
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; NOHARDENARM-NEXT: lsl r0, r0, #1
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; NOHARDENARM-NEXT: .LBB3_7: @ %sw.epilog
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; NOHARDENARM-NEXT: bx lr
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;
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; NOHARDENTHUMB-LABEL: jumptable:
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; NOHARDENTHUMB: @ %bb.0: @ %entry
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; NOHARDENTHUMB-NEXT: cmp r1, #4
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; NOHARDENTHUMB-NEXT: bhi .LBB3_7
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; NOHARDENTHUMB-NEXT: @ %bb.1: @ %entry
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; NOHARDENTHUMB-NEXT: .LCPI3_0:
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; NOHARDENTHUMB-NEXT: tbb [pc, r1]
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; NOHARDENTHUMB-NEXT: @ %bb.2:
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; NOHARDENTHUMB-NEXT: .LJTI3_0:
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; NOHARDENTHUMB-NEXT: .byte (.LBB3_3-(.LCPI3_0+4))/2
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; NOHARDENTHUMB-NEXT: .byte (.LBB3_4-(.LCPI3_0+4))/2
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; NOHARDENTHUMB-NEXT: .byte (.LBB3_7-(.LCPI3_0+4))/2
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; NOHARDENTHUMB-NEXT: .byte (.LBB3_5-(.LCPI3_0+4))/2
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; NOHARDENTHUMB-NEXT: .byte (.LBB3_6-(.LCPI3_0+4))/2
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; NOHARDENTHUMB-NEXT: .p2align 1
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; NOHARDENTHUMB-NEXT: .LBB3_3: @ %sw.bb
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; NOHARDENTHUMB-NEXT: lsls r0, r0, #1
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; NOHARDENTHUMB-NEXT: .LBB3_4: @ %sw.bb1
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; NOHARDENTHUMB-NEXT: lsls r0, r0, #1
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; NOHARDENTHUMB-NEXT: .LBB3_5: @ %sw.bb3
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; NOHARDENTHUMB-NEXT: lsls r0, r0, #1
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; NOHARDENTHUMB-NEXT: .LBB3_6: @ %sw.bb5
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; NOHARDENTHUMB-NEXT: lsls r0, r0, #1
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; NOHARDENTHUMB-NEXT: .LBB3_7: @ %sw.epilog
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; NOHARDENTHUMB-NEXT: bx lr
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entry:
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switch i32 %b, label %sw.epilog [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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i32 3, label %sw.bb3
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i32 4, label %sw.bb5
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]
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sw.bb: ; preds = %entry
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%add = shl nsw i32 %a, 1
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br label %sw.bb1
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sw.bb1: ; preds = %entry, %sw.bb
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%a.addr.0 = phi i32 [ %a, %entry ], [ %add, %sw.bb ]
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%add2 = shl nsw i32 %a.addr.0, 1
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br label %sw.bb3
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sw.bb3: ; preds = %entry, %sw.bb1
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%a.addr.1 = phi i32 [ %a, %entry ], [ %add2, %sw.bb1 ]
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%add4 = shl nsw i32 %a.addr.1, 1
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br label %sw.bb5
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sw.bb5: ; preds = %entry, %sw.bb3
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%a.addr.2 = phi i32 [ %a, %entry ], [ %add4, %sw.bb3 ]
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%add6 = shl nsw i32 %a.addr.2, 1
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br label %sw.epilog
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sw.epilog: ; preds = %sw.bb5, %entry
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%a.addr.3 = phi i32 [ %a, %entry ], [ %add6, %sw.bb5 ]
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ret i32 %a.addr.3
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}
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define dso_local i32 @indirect_call(
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; NOHARDENARM-LABEL: indirect_call:
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; NOHARDENARM: @ %bb.0: @ %entry
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; NOHARDENARM-NEXT: .save {r4, r5, r11, lr}
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; NOHARDENARM-NEXT: push {r4, r5, r11, lr}
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; NOHARDENARM-NEXT: mov r4, r1
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; NOHARDENARM-NEXT: blx r0
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; NOHARDENARM-NEXT: mov r5, r0
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; NOHARDENARM-NEXT: blx r4
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; NOHARDENARM-NEXT: add r0, r0, r5
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; NOHARDENARM-NEXT: pop {r4, r5, r11, pc}
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;
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; NOHARDENTHUMB-LABEL: indirect_call:
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; NOHARDENTHUMB: @ %bb.0: @ %entry
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; NOHARDENTHUMB-NEXT: .save {r4, r5, r7, lr}
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; NOHARDENTHUMB-NEXT: push {r4, r5, r7, lr}
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; NOHARDENTHUMB-NEXT: mov r4, r1
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; NOHARDENTHUMB-NEXT: blx r0
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; NOHARDENTHUMB-NEXT: mov r5, r0
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; NOHARDENTHUMB-NEXT: blx r4
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; NOHARDENTHUMB-NEXT: add r0, r5
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; NOHARDENTHUMB-NEXT: pop {r4, r5, r7, pc}
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i32 (...)* nocapture %f1, i32 (...)* nocapture %f2) {
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entry:
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%callee.knr.cast = bitcast i32 (...)* %f1 to i32 ()*
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%call = tail call i32 %callee.knr.cast()
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; HARDENARM: bl {{__llvm_slsblr_thunk_arm_r[0-9]+$}}
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%callee.knr.cast1 = bitcast i32 (...)* %f2 to i32 ()*
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%call2 = tail call i32 %callee.knr.cast1()
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; HARDENARM: bl {{__llvm_slsblr_thunk_arm_r[0-9]+$}}
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%add = add nsw i32 %call2, %call
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ret i32 %add
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}
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; verify calling through a function pointer.
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@a = dso_local local_unnamed_addr global i32 (...)* null, align 8
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@b = dso_local local_unnamed_addr global i32 0, align 4
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define dso_local void @indirect_call_global() local_unnamed_addr {
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; NOHARDENARM-LABEL: indirect_call_global:
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; NOHARDENARM: @ %bb.0: @ %entry
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; NOHARDENARM-NEXT: .save {r11, lr}
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; NOHARDENARM-NEXT: push {r11, lr}
|
|
; NOHARDENARM-NEXT: movw r0, :lower16:a
|
|
; NOHARDENARM-NEXT: movt r0, :upper16:a
|
|
; NOHARDENARM-NEXT: ldr r0, [r0]
|
|
; NOHARDENARM-NEXT: blx r0
|
|
; NOHARDENARM-NEXT: movw r1, :lower16:b
|
|
; NOHARDENARM-NEXT: movt r1, :upper16:b
|
|
; NOHARDENARM-NEXT: str r0, [r1]
|
|
; NOHARDENARM-NEXT: pop {r11, pc}
|
|
;
|
|
; NOHARDENTHUMB-LABEL: indirect_call_global:
|
|
; NOHARDENTHUMB: @ %bb.0: @ %entry
|
|
; NOHARDENTHUMB-NEXT: .save {r7, lr}
|
|
; NOHARDENTHUMB-NEXT: push {r7, lr}
|
|
; NOHARDENTHUMB-NEXT: movw r0, :lower16:a
|
|
; NOHARDENTHUMB-NEXT: movt r0, :upper16:a
|
|
; NOHARDENTHUMB-NEXT: ldr r0, [r0]
|
|
; NOHARDENTHUMB-NEXT: blx r0
|
|
; NOHARDENTHUMB-NEXT: movw r1, :lower16:b
|
|
; NOHARDENTHUMB-NEXT: movt r1, :upper16:b
|
|
; NOHARDENTHUMB-NEXT: str r0, [r1]
|
|
; NOHARDENTHUMB-NEXT: pop {r7, pc}
|
|
entry:
|
|
%0 = load i32 ()*, i32 ()** bitcast (i32 (...)** @a to i32 ()**), align 8
|
|
%call = tail call i32 %0() nounwind
|
|
; HARDENARM: bl {{__llvm_slsblr_thunk_arm_r[0-9]+$}}
|
|
store i32 %call, i32* @b, align 4
|
|
ret void
|
|
}
|
|
|
|
; Verify that neither r12 nor lr are used as registers in indirect call
|
|
; instructions when the sls-hardening-blr mitigation is enabled, as
|
|
; (a) a linker is allowed to clobber r12 on calls, and
|
|
; (b) the hardening transformation isn't correct if lr is the register holding
|
|
; the address of the function called.
|
|
define i32 @check_r12(i32 ()** %fp) {
|
|
; NOHARDENARM-LABEL: check_r12:
|
|
; NOHARDENARM: @ %bb.0: @ %entry
|
|
; NOHARDENARM-NEXT: .save {r11, lr}
|
|
; NOHARDENARM-NEXT: push {r11, lr}
|
|
; NOHARDENARM-NEXT: ldr r12, [r0]
|
|
; NOHARDENARM-NEXT: @APP
|
|
; NOHARDENARM-NEXT: add r12, r12, #0
|
|
; NOHARDENARM-NEXT: @NO_APP
|
|
; NOHARDENARM-NEXT: blx r12
|
|
; NOHARDENARM-NEXT: pop {r11, pc}
|
|
;
|
|
; NOHARDENTHUMB-LABEL: check_r12:
|
|
; NOHARDENTHUMB: @ %bb.0: @ %entry
|
|
; NOHARDENTHUMB-NEXT: .save {r7, lr}
|
|
; NOHARDENTHUMB-NEXT: push {r7, lr}
|
|
; NOHARDENTHUMB-NEXT: ldr.w r12, [r0]
|
|
; NOHARDENTHUMB-NEXT: @APP
|
|
; NOHARDENTHUMB-NEXT: add.w r12, r12, #0
|
|
; NOHARDENTHUMB-NEXT: @NO_APP
|
|
; NOHARDENTHUMB-NEXT: blx r12
|
|
; NOHARDENTHUMB-NEXT: pop {r7, pc}
|
|
entry:
|
|
%f = load i32 ()*, i32 ()** %fp, align 4
|
|
; Force f to be moved into r12
|
|
%r12_f = tail call i32 ()* asm "add $0, $1, #0", "={r12},{r12}"(i32 ()* %f) nounwind
|
|
%call = call i32 %r12_f()
|
|
ret i32 %call
|
|
}
|
|
|
|
define i32 @check_lr(i32 ()** %fp) {
|
|
; NOHARDENARM-LABEL: check_lr:
|
|
; NOHARDENARM: @ %bb.0: @ %entry
|
|
; NOHARDENARM-NEXT: .save {r11, lr}
|
|
; NOHARDENARM-NEXT: push {r11, lr}
|
|
; NOHARDENARM-NEXT: ldr lr, [r0]
|
|
; NOHARDENARM-NEXT: @APP
|
|
; NOHARDENARM-NEXT: add lr, lr, #0
|
|
; NOHARDENARM-NEXT: @NO_APP
|
|
; NOHARDENARM-NEXT: blx lr
|
|
; NOHARDENARM-NEXT: pop {r11, pc}
|
|
;
|
|
; NOHARDENTHUMB-LABEL: check_lr:
|
|
; NOHARDENTHUMB: @ %bb.0: @ %entry
|
|
; NOHARDENTHUMB-NEXT: .save {r7, lr}
|
|
; NOHARDENTHUMB-NEXT: push {r7, lr}
|
|
; NOHARDENTHUMB-NEXT: ldr.w lr, [r0]
|
|
; NOHARDENTHUMB-NEXT: @APP
|
|
; NOHARDENTHUMB-NEXT: add.w lr, lr, #0
|
|
; NOHARDENTHUMB-NEXT: @NO_APP
|
|
; NOHARDENTHUMB-NEXT: blx lr
|
|
; NOHARDENTHUMB-NEXT: pop {r7, pc}
|
|
entry:
|
|
%f = load i32 ()*, i32 ()** %fp, align 4
|
|
; Force f to be moved into lr
|
|
%lr_f = tail call i32 ()* asm "add $0, $1, #0", "={lr},{lr}"(i32 ()* %f) nounwind
|
|
%call = call i32 %lr_f()
|
|
ret i32 %call
|
|
}
|
|
|
|
; Verify that even when sls-harden-blr is enabled, "blx r12" is still an
|
|
; instruction that is accepted by the inline assembler
|
|
define void @verify_inline_asm_blx_r12(void ()* %g) {
|
|
; ISBDSB-LABEL: verify_inline_asm_blx_r12:
|
|
; ISBDSB: @ %bb.0: @ %entry
|
|
; ISBDSB-NEXT: mov r12, r0
|
|
; ISBDSB-NEXT: @APP
|
|
; ISBDSB-NEXT: blx r12
|
|
; ISBDSB-NEXT: @NO_APP
|
|
; ISBDSB-NEXT: bx lr
|
|
; ISBDSB-NEXT: dsb sy
|
|
; ISBDSB-NEXT: isb sy
|
|
;
|
|
; SB-LABEL: verify_inline_asm_blx_r12:
|
|
; SB: @ %bb.0: @ %entry
|
|
; SB-NEXT: mov r12, r0
|
|
; SB-NEXT: @APP
|
|
; SB-NEXT: blx r12
|
|
; SB-NEXT: @NO_APP
|
|
; SB-NEXT: bx lr
|
|
; SB-NEXT: sb
|
|
;
|
|
; NOHARDENARM-LABEL: verify_inline_asm_blx_r12:
|
|
; NOHARDENARM: @ %bb.0: @ %entry
|
|
; NOHARDENARM-NEXT: mov r12, r0
|
|
; NOHARDENARM-NEXT: @APP
|
|
; NOHARDENARM-NEXT: blx r12
|
|
; NOHARDENARM-NEXT: @NO_APP
|
|
; NOHARDENARM-NEXT: bx lr
|
|
;
|
|
; NOHARDENTHUMB-LABEL: verify_inline_asm_blx_r12:
|
|
; NOHARDENTHUMB: @ %bb.0: @ %entry
|
|
; NOHARDENTHUMB-NEXT: mov r12, r0
|
|
; NOHARDENTHUMB-NEXT: @APP
|
|
; NOHARDENTHUMB-NEXT: blx r12
|
|
; NOHARDENTHUMB-NEXT: @NO_APP
|
|
; NOHARDENTHUMB-NEXT: bx lr
|
|
entry:
|
|
%0 = bitcast void ()* %g to i8*
|
|
tail call void asm sideeffect "blx $0", "{r12}"(i8* %0) nounwind
|
|
ret void
|
|
}
|
|
|
|
; HARDEN-COMDAT: .section {{.text.__llvm_slsblr_thunk_(arm|thumb)_r5}}
|
|
; HARDEN-COMDAT: .hidden {{__llvm_slsblr_thunk_(arm|thumb)_r5}}
|
|
; HARDEN-COMDAT: .weak {{__llvm_slsblr_thunk_(arm|thumb)_r5}}
|
|
; HARDEN-COMDAT: .type {{__llvm_slsblr_thunk_(arm|thumb)_r5}},%function
|
|
; HARDEN-COMDAT-OFF-NOT: .section {{.text.__llvm_slsblr_thunk_(arm|thumb)_r5}}
|
|
; HARDEN-COMDAT-OFF-NOT: .hidden {{__llvm_slsblr_thunk_(arm|thumb)_r5}}
|
|
; HARDEN-COMDAT-OFF-NOT: .weak {{__llvm_slsblr_thunk_(arm|thumb)_r5}}
|
|
; HARDEN-COMDAT-OFF: .type {{__llvm_slsblr_thunk_(arm|thumb)_r5}},%function
|
|
; HARDEN-label: {{__llvm_slsblr_thunk_(arm|thumb)_r5}}:
|
|
; HARDEN: bx r5
|
|
; ISBDSB-NEXT: dsb sy
|
|
; ISBDSB-NEXT: isb
|
|
; SB-NEXT: dsb sy
|
|
; SB-NEXT: isb
|
|
; HARDEN-NEXT: .Lfunc_end
|
|
|
|
|