forked from OSchip/llvm-project
40 lines
1.8 KiB
YAML
40 lines
1.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple arm-arm-eabi -mcpu=cortex-m7 -verify-machineinstrs -run-pass=postmisched %s -o - | FileCheck %s
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---
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name: test_groups
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alignment: 2
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tracksRegLiveness: true
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liveins:
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- { reg: '$d0' }
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- { reg: '$r0' }
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- { reg: '$r1' }
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- { reg: '$r2' }
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- { reg: '$r3' }
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- { reg: '$r4' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0, $r0, $r1, $r2, $r3, $r4
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; CHECK-LABEL: name: test_groups
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; CHECK: liveins: $d0, $r0, $r1, $r2, $r3, $r4
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; CHECK: renamable $d0 = VADDD killed renamable $d0, renamable $d0, 14 /* CC::al */, $noreg
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; CHECK: renamable $r3 = t2ADDrr killed renamable $r3, renamable $r3, 14 /* CC::al */, $noreg, $noreg
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; CHECK: renamable $s2 = VLDRS killed renamable $r0, 0, 14 /* CC::al */, $noreg
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; CHECK: VSTRS killed renamable $s2, killed renamable $r1, 0, 14 /* CC::al */, $noreg
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; CHECK: t2STRi12 killed renamable $r3, killed renamable $r2, 0, 14 /* CC::al */, $noreg
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; CHECK: renamable $r4 = t2ADDrr killed renamable $r4, renamable $r4, 14 /* CC::al */, $noreg, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $d0
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renamable $s2 = VLDRS killed renamable $r0, 0, 14 /* CC::al */, $noreg
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renamable $d0 = VADDD killed renamable $d0, renamable $d0, 14 /* CC::al */, $noreg
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VSTRS killed renamable $s2, killed renamable $r1, 0, 14 /* CC::al */, $noreg
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renamable $r3 = t2ADDrr killed renamable $r3, renamable $r3, 14 /* CC::al */, $noreg, $noreg
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t2STRi12 killed renamable $r3, killed renamable $r2, 0, 14 /* CC::al */, $noreg
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renamable $r4 = t2ADDrr killed renamable $r4, renamable $r4, 14 /* CC::al */, $noreg, $noreg
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tBX_RET 14 /* CC::al */, $noreg, implicit $d0
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...
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