forked from OSchip/llvm-project
201 lines
6.5 KiB
LLVM
201 lines
6.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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; For all the functions below should the operation is a nop
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define <vscale x 8 x i8> @trunc_i16toi8(<vscale x 8 x i16> %in) {
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; CHECK-LABEL: trunc_i16toi8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 8 x i16> %in to <vscale x 8 x i8>
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ret <vscale x 8 x i8> %out
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}
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define <vscale x 4 x i8> @trunc_i32toi8(<vscale x 4 x i32> %in) {
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; CHECK-LABEL: trunc_i32toi8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 4 x i32> %in to <vscale x 4 x i8>
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ret <vscale x 4 x i8> %out
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}
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define <vscale x 2 x i8> @trunc_i64toi8(<vscale x 2 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 2 x i64> %in to <vscale x 2 x i8>
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ret <vscale x 2 x i8> %out
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}
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define <vscale x 4 x i16> @trunc_i32toi16(<vscale x 4 x i32> %in) {
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; CHECK-LABEL: trunc_i32toi16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 4 x i32> %in to <vscale x 4 x i16>
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ret <vscale x 4 x i16> %out
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}
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define <vscale x 2 x i16> @trunc_i64toi16(<vscale x 2 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 2 x i64> %in to <vscale x 2 x i16>
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ret <vscale x 2 x i16> %out
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}
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define <vscale x 2 x i32> @trunc_i64toi32(<vscale x 2 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 2 x i64> %in to <vscale x 2 x i32>
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ret <vscale x 2 x i32> %out
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}
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; Truncating to i1 requires convert it to a cmp
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define <vscale x 2 x i1> @trunc_i64toi1(<vscale x 2 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: and z0.d, z0.d, #0x1
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; CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #0
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 2 x i64> %in to <vscale x 2 x i1>
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ret <vscale x 2 x i1> %out
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}
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define <vscale x 4 x i1> @trunc_i64toi1_split(<vscale x 4 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi1_split:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: and z1.d, z1.d, #0x1
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; CHECK-NEXT: and z0.d, z0.d, #0x1
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; CHECK-NEXT: cmpne p1.d, p0/z, z1.d, #0
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; CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #0
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; CHECK-NEXT: uzp1 p0.s, p0.s, p1.s
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 4 x i64> %in to <vscale x 4 x i1>
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ret <vscale x 4 x i1> %out
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}
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define <vscale x 8 x i1> @trunc_i64toi1_split2(<vscale x 8 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi1_split2:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: and z3.d, z3.d, #0x1
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; CHECK-NEXT: and z2.d, z2.d, #0x1
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; CHECK-NEXT: and z1.d, z1.d, #0x1
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; CHECK-NEXT: and z0.d, z0.d, #0x1
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; CHECK-NEXT: cmpne p1.d, p0/z, z3.d, #0
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; CHECK-NEXT: cmpne p2.d, p0/z, z2.d, #0
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; CHECK-NEXT: uzp1 p1.s, p2.s, p1.s
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; CHECK-NEXT: cmpne p2.d, p0/z, z1.d, #0
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; CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #0
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; CHECK-NEXT: uzp1 p0.s, p0.s, p2.s
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; CHECK-NEXT: uzp1 p0.h, p0.h, p1.h
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 8 x i64> %in to <vscale x 8 x i1>
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ret <vscale x 8 x i1> %out
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}
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define <vscale x 16 x i1> @trunc_i64toi1_split3(<vscale x 16 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi1_split3:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: addvl sp, sp, #-1
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; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: and z7.d, z7.d, #0x1
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; CHECK-NEXT: and z6.d, z6.d, #0x1
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; CHECK-NEXT: and z5.d, z5.d, #0x1
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; CHECK-NEXT: and z4.d, z4.d, #0x1
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; CHECK-NEXT: and z3.d, z3.d, #0x1
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; CHECK-NEXT: and z2.d, z2.d, #0x1
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; CHECK-NEXT: cmpne p1.d, p0/z, z7.d, #0
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; CHECK-NEXT: cmpne p2.d, p0/z, z6.d, #0
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; CHECK-NEXT: cmpne p3.d, p0/z, z5.d, #0
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; CHECK-NEXT: cmpne p4.d, p0/z, z4.d, #0
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; CHECK-NEXT: and z1.d, z1.d, #0x1
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; CHECK-NEXT: and z0.d, z0.d, #0x1
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; CHECK-NEXT: uzp1 p1.s, p2.s, p1.s
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; CHECK-NEXT: cmpne p2.d, p0/z, z3.d, #0
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; CHECK-NEXT: uzp1 p3.s, p4.s, p3.s
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; CHECK-NEXT: cmpne p4.d, p0/z, z2.d, #0
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; CHECK-NEXT: uzp1 p2.s, p4.s, p2.s
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; CHECK-NEXT: cmpne p4.d, p0/z, z1.d, #0
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; CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #0
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; CHECK-NEXT: uzp1 p0.s, p0.s, p4.s
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; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload
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; CHECK-NEXT: uzp1 p1.h, p3.h, p1.h
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; CHECK-NEXT: uzp1 p0.h, p0.h, p2.h
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; CHECK-NEXT: uzp1 p0.b, p0.b, p1.b
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; CHECK-NEXT: addvl sp, sp, #1
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; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 16 x i64> %in to <vscale x 16 x i1>
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ret <vscale x 16 x i1> %out
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}
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define <vscale x 4 x i1> @trunc_i32toi1(<vscale x 4 x i32> %in) {
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; CHECK-LABEL: trunc_i32toi1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: and z0.s, z0.s, #0x1
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; CHECK-NEXT: cmpne p0.s, p0/z, z0.s, #0
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 4 x i32> %in to <vscale x 4 x i1>
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ret <vscale x 4 x i1> %out
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}
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define <vscale x 8 x i1> @trunc_i16toi1(<vscale x 8 x i16> %in) {
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; CHECK-LABEL: trunc_i16toi1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: and z0.h, z0.h, #0x1
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; CHECK-NEXT: cmpne p0.h, p0/z, z0.h, #0
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 8 x i16> %in to <vscale x 8 x i1>
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ret <vscale x 8 x i1> %out
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}
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define <vscale x 16 x i1> @trunc_i8toi1(<vscale x 16 x i8> %in) {
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; CHECK-LABEL: trunc_i8toi1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.b
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; CHECK-NEXT: and z0.b, z0.b, #0x1
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; CHECK-NEXT: cmpne p0.b, p0/z, z0.b, #0
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; CHECK-NEXT: ret
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entry:
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%out = trunc <vscale x 16 x i8> %in to <vscale x 16 x i1>
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ret <vscale x 16 x i1> %out
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}
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define void @trunc_promoteIntRes(<vscale x 4 x i64> %0, i16* %ptr) {
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; CHECK-LABEL: trunc_promoteIntRes:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: st1h { z0.s }, p0, [x0]
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; CHECK-NEXT: ret
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entry:
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%1 = trunc <vscale x 4 x i64> %0 to <vscale x 4 x i16>
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%2 = bitcast i16* %ptr to <vscale x 4 x i16>*
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store <vscale x 4 x i16> %1, <vscale x 4 x i16>* %2, align 2
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ret void
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}
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