forked from OSchip/llvm-project
180 lines
6.7 KiB
LLVM
180 lines
6.7 KiB
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -stop-after=finalize-isel < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -stop-after=prologepilog < %s | FileCheck %s --check-prefix=CHECKCSR
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; CHECK-LABEL: name: nosve_signature
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define i32 @nosve_signature() nounwind {
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ret i32 42
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}
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; CHECK-LABEL: name: sve_signature_ret_vec
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define <vscale x 4 x i32> @sve_signature_ret_vec() nounwind {
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ret <vscale x 4 x i32> undef
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}
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; CHECK-LABEL: name: sve_signature_ret_pred
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define <vscale x 4 x i1> @sve_signature_ret_pred() nounwind {
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ret <vscale x 4 x i1> undef
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}
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; CHECK-LABEL: name: sve_signature_arg_vec
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define void @sve_signature_arg_vec(<vscale x 4 x i32> %arg) nounwind {
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ret void
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}
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; CHECK-LABEL: name: sve_signature_arg_pred
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define void @sve_signature_arg_pred(<vscale x 4 x i1> %arg) nounwind {
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ret void
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}
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; CHECK-LABEL: name: caller_nosve_signature
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; CHECK: BL @nosve_signature, csr_aarch64_aapcs
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define i32 @caller_nosve_signature() nounwind {
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%res = call i32 @nosve_signature()
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ret i32 %res
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}
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; CHECK-LABEL: name: caller_nosve_signature_fastcc
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; CHECK: BL @nosve_signature, csr_aarch64_aapcs
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define i32 @caller_nosve_signature_fastcc() nounwind {
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%res = call fastcc i32 @nosve_signature()
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ret i32 %res
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}
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; CHECK-LABEL: name: sve_signature_ret_vec_caller
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; CHECK: BL @sve_signature_ret_vec, csr_aarch64_sve_aapcs
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define <vscale x 4 x i32> @sve_signature_ret_vec_caller() nounwind {
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%res = call <vscale x 4 x i32> @sve_signature_ret_vec()
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ret <vscale x 4 x i32> %res
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}
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; CHECK-LABEL: name: sve_signature_ret_vec_caller_fastcc
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; CHECK: BL @sve_signature_ret_vec, csr_aarch64_sve_aapcs
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define <vscale x 4 x i32> @sve_signature_ret_vec_caller_fastcc() nounwind {
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%res = call fastcc <vscale x 4 x i32> @sve_signature_ret_vec()
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ret <vscale x 4 x i32> %res
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}
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; CHECK-LABEL: name: sve_signature_ret_pred_caller
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; CHECK: BL @sve_signature_ret_pred, csr_aarch64_sve_aapcs
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define <vscale x 4 x i1> @sve_signature_ret_pred_caller() nounwind {
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%res = call <vscale x 4 x i1> @sve_signature_ret_pred()
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ret <vscale x 4 x i1> %res
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}
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; CHECK-LABEL: name: sve_signature_ret_pred_caller_fastcc
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; CHECK: BL @sve_signature_ret_pred, csr_aarch64_sve_aapcs
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define <vscale x 4 x i1> @sve_signature_ret_pred_caller_fastcc() nounwind {
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%res = call fastcc <vscale x 4 x i1> @sve_signature_ret_pred()
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ret <vscale x 4 x i1> %res
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}
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; CHECK-LABEL: name: sve_signature_arg_vec_caller
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; CHECK: BL @sve_signature_arg_vec, csr_aarch64_sve_aapcs
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define void @sve_signature_arg_vec_caller(<vscale x 4 x i32> %arg) nounwind {
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call void @sve_signature_arg_vec(<vscale x 4 x i32> %arg)
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ret void
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}
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; CHECK-LABEL: name: sve_signature_arg_vec_caller_fastcc
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; CHECK: BL @sve_signature_arg_vec, csr_aarch64_sve_aapcs
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define void @sve_signature_arg_vec_caller_fastcc(<vscale x 4 x i32> %arg) nounwind {
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call fastcc void @sve_signature_arg_vec(<vscale x 4 x i32> %arg)
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ret void
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}
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; CHECK-LABEL: name: sve_signature_arg_pred_caller
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; CHECK: BL @sve_signature_arg_pred, csr_aarch64_sve_aapcs
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define void @sve_signature_arg_pred_caller(<vscale x 4 x i1> %arg) nounwind {
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call void @sve_signature_arg_pred(<vscale x 4 x i1> %arg)
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ret void
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}
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; CHECK-LABEL: name: sve_signature_arg_pred_caller_fastcc
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; CHECK: BL @sve_signature_arg_pred, csr_aarch64_sve_aapcs
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define void @sve_signature_arg_pred_caller_fastcc(<vscale x 4 x i1> %arg) nounwind {
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call fastcc void @sve_signature_arg_pred(<vscale x 4 x i1> %arg)
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ret void
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}
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; CHECK-LABEL: name: sve_signature_many_arg_vec
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; CHECK: [[RES:%[0-9]+]]:zpr = COPY $z7
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; CHECK: $z0 = COPY [[RES]]
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; CHECK: RET_ReallyLR implicit $z0
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define <vscale x 4 x i32> @sve_signature_many_arg_vec(<vscale x 4 x i32> %arg1, <vscale x 4 x i32> %arg2, <vscale x 4 x i32> %arg3, <vscale x 4 x i32> %arg4, <vscale x 4 x i32> %arg5, <vscale x 4 x i32> %arg6, <vscale x 4 x i32> %arg7, <vscale x 4 x i32> %arg8) nounwind {
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ret <vscale x 4 x i32> %arg8
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}
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; CHECK-LABEL: name: sve_signature_many_arg_pred
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; CHECK: [[RES:%[0-9]+]]:ppr = COPY $p3
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; CHECK: $p0 = COPY [[RES]]
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; CHECK: RET_ReallyLR implicit $p0
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define <vscale x 4 x i1> @sve_signature_many_arg_pred(<vscale x 4 x i1> %arg1, <vscale x 4 x i1> %arg2, <vscale x 4 x i1> %arg3, <vscale x 4 x i1> %arg4) nounwind {
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ret <vscale x 4 x i1> %arg4
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}
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; CHECK-LABEL: name: sve_signature_vec
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; CHECK: [[RES:%[0-9]+]]:zpr = COPY $z1
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; CHECK: $z0 = COPY [[RES]]
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; CHECK: RET_ReallyLR implicit $z0
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define <vscale x 4 x i32> @sve_signature_vec(<vscale x 4 x i32> %arg1, <vscale x 4 x i32> %arg2) nounwind {
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ret <vscale x 4 x i32> %arg2
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}
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; CHECK-LABEL: name: sve_signature_pred
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; CHECK: [[RES:%[0-9]+]]:ppr = COPY $p1
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; CHECK: $p0 = COPY [[RES]]
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; CHECK: RET_ReallyLR implicit $p0
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define <vscale x 4 x i1> @sve_signature_pred(<vscale x 4 x i1> %arg1, <vscale x 4 x i1> %arg2) nounwind {
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ret <vscale x 4 x i1> %arg2
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}
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; CHECK-LABEL: name: sve_signature_vec_caller
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; CHECK-DAG: [[ARG2:%[0-9]+]]:zpr = COPY $z1
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; CHECK-DAG: [[ARG1:%[0-9]+]]:zpr = COPY $z0
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; CHECK-DAG: $z0 = COPY [[ARG2]]
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; CHECK-DAG: $z1 = COPY [[ARG1]]
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; CHECK-NEXT: BL @sve_signature_vec, csr_aarch64_sve_aapcs
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; CHECK: [[RES:%[0-9]+]]:zpr = COPY $z0
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; CHECK: $z0 = COPY [[RES]]
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; CHECK: RET_ReallyLR implicit $z0
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define <vscale x 4 x i32> @sve_signature_vec_caller(<vscale x 4 x i32> %arg1, <vscale x 4 x i32> %arg2) nounwind {
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%res = call <vscale x 4 x i32> @sve_signature_vec(<vscale x 4 x i32> %arg2, <vscale x 4 x i32> %arg1)
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ret <vscale x 4 x i32> %res
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}
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; CHECK-LABEL: name: sve_signature_pred_caller
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; CHECK-DAG: [[ARG2:%[0-9]+]]:ppr = COPY $p1
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; CHECK-DAG: [[ARG1:%[0-9]+]]:ppr = COPY $p0
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; CHECK-DAG: $p0 = COPY [[ARG2]]
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; CHECK-DAG: $p1 = COPY [[ARG1]]
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; CHECK-NEXT: BL @sve_signature_pred, csr_aarch64_sve_aapcs
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; CHECK: [[RES:%[0-9]+]]:ppr = COPY $p0
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; CHECK: $p0 = COPY [[RES]]
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; CHECK: RET_ReallyLR implicit $p0
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define <vscale x 4 x i1> @sve_signature_pred_caller(<vscale x 4 x i1> %arg1, <vscale x 4 x i1> %arg2) nounwind {
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%res = call <vscale x 4 x i1> @sve_signature_pred(<vscale x 4 x i1> %arg2, <vscale x 4 x i1> %arg1)
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ret <vscale x 4 x i1> %res
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}
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; Test that functions returning or taking SVE arguments use the correct
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; callee-saved set when using the default C calling convention (as opposed
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; to aarch64_sve_vector_pcs)
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; CHECKCSR-LABEL: name: sve_signature_vec_ret_callee
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; CHECKCSR: callee-saved-register: '$z8'
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; CHECKCSR: callee-saved-register: '$p4'
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; CHECKCSR: RET_ReallyLR
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define <vscale x 4 x i32> @sve_signature_vec_ret_callee() nounwind {
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call void asm sideeffect "nop", "~{z8},~{p4}"()
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ret <vscale x 4 x i32> zeroinitializer
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}
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; CHECKCSR-LABEL: name: sve_signature_vec_arg_callee
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; CHECKCSR: callee-saved-register: '$z8'
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; CHECKCSR: callee-saved-register: '$p4'
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; CHECKCSR: RET_ReallyLR
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define void @sve_signature_vec_arg_callee(<vscale x 4 x i32> %v) nounwind {
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call void asm sideeffect "nop", "~{z8},~{p4}"()
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ret void
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}
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