forked from OSchip/llvm-project
547 lines
18 KiB
YAML
547 lines
18 KiB
YAML
# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -verify-machineinstrs -aarch64-load-store-renaming=true -o - %s | FileCheck %s
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# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -verify-machineinstrs -aarch64-load-store-renaming=false -o - %s | FileCheck --check-prefix=NO-RENAME %s
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# NO-RENAME-NOT: STP
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# NO-RENAME: test12
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# NO-RENAME: STP
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# NO-RENAME-NOT: STP
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#
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---
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# CHECK-LABEL: name: test1
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# CHECK: bb.0:
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# CHECK-NEXT: liveins: $x0, $x1
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# CHECK: $x10, renamable $x8 = LDPXi renamable $x0, 0 :: (load (s64))
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# CHECK-NEXT: renamable $x9 = LDRXui renamable $x0, 1 :: (load (s64))
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# CHECK-NEXT: STRXui renamable $x9, renamable $x0, 100 :: (store (s64), align 4)
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# CHECK-NEXT: renamable $x8 = ADDXrr $x8, $x8
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# CHECK-NEXT: STPXi renamable $x8, killed $x10, renamable $x0, 10 :: (store (s64), align 4)
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# CHECK-NEXT: RET undef $lr
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name: test1
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1
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renamable $x9, renamable $x8 = LDPXi renamable $x0, 0 :: (load (s64))
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STRXui renamable killed $x9, renamable $x0, 11 :: (store (s64), align 4)
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renamable $x9 = LDRXui renamable $x0, 1 :: (load (s64))
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STRXui renamable $x9, renamable $x0, 100 :: (store (s64), align 4)
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renamable $x8 = ADDXrr $x8, $x8
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STRXui renamable $x8, renamable $x0, 10 :: (store (s64), align 4)
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RET undef $lr
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...
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---
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# CHECK-LABEL: name: test2
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# CHECK-LABEL: bb.0:
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# CHECK-NEXT: liveins: $x0, $x9, $x1
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# CHECK: $x10, renamable $x8 = LDPXi renamable $x9, 0 :: (load (s64))
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# CHECK-NEXT: renamable $x9 = LDRXui renamable $x0, 2 :: (load (s64))
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# CHECK-NEXT: STRXui renamable $x9, renamable $x0, 100 :: (store (s64), align 4)
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# CHECK-NEXT: renamable $x8 = ADDXrr $x8, $x8
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# CHECK-NEXT: STPXi renamable $x8, killed $x10, renamable $x0, 10 :: (store (s64), align 4)
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# CHECK-NEXT: RET undef $lr
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name: test2
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x9' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x9, $x1
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renamable $x9, renamable $x8 = LDPXi renamable $x9, 0 :: (load (s64))
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STRXui renamable killed $x9, renamable $x0, 11 :: (store (s64), align 4)
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renamable $x9 = LDRXui renamable $x0, 2 :: (load (s64))
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STRXui renamable $x9, renamable $x0, 100 :: (store (s64), align 4)
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renamable $x8 = ADDXrr $x8, $x8
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STRXui renamable $x8, renamable $x0, 10 :: (store (s64), align 4)
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RET undef $lr
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...
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---
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# MOVK has a tied operand and we currently do not rename across tied defs.
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# CHECK-LABEL: bb.0:
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# CHECK-NEXT: liveins: $x0
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#
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# CHECK: renamable $x8 = MRS 58880
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# CHECK-NEXT: renamable $x8 = MOVZXi 15309, 0
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# CHECK-NEXT: renamable $x8 = MOVKXi renamable $x8, 26239, 16
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# CHECK-NEXT: STRXui renamable $x8, renamable $x0, 0, implicit killed $x8 :: (store (s64))
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# CHECK-NEXT: renamable $x8 = MRS 55840
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# CHECK-NEXT: STRXui killed renamable $x8, killed renamable $x0, 1, implicit killed $x8 :: (store (s64))
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# CHECK-NEXT: RET undef $lr
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#
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name: test3
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alignment: 2
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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frameInfo:
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0
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renamable $x8 = MRS 58880, implicit-def $nzcv
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renamable $x8 = MOVZXi 15309, 0
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renamable $x8 = MOVKXi renamable $x8, 26239, 16
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STRXui renamable $x8, renamable $x0, 0, implicit killed $x8 :: (store (s64))
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renamable $x8 = MRS 55840, implicit-def $nzcv
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STRXui killed renamable $x8, renamable killed $x0, 1, implicit killed $x8 :: (store (s64))
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RET undef $lr
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...
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---
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# CHECK-LABEL: name: test4
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# CHECK-LABEL: bb.0:
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# CHECK-NEXT: liveins: $x0, $x1
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# CHECK: $x9 = MRS 58880
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# CHECK-NEXT: renamable $x8 = MRS 55840
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# CHECK-NEXT: STPXi $x9, killed renamable $x8, killed renamable $x0, 0 :: (store (s32))
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# CHECK-NEXT: RET undef $lr
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name: test4
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1
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renamable $x8 = MRS 58880, implicit-def $nzcv
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STRXui renamable $x8, renamable $x0, 0, implicit killed $x8 :: (store (s32))
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renamable $x8 = MRS 55840, implicit-def $nzcv
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STRXui killed renamable $x8, renamable killed $x0, 1, implicit killed $x8 :: (store (s32))
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RET undef $lr
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...
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---
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# CHECK-LABEL: name: test5
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# CHECK-LABEL: bb.0:
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# CHECK-NEXT: liveins: $x0, $x1
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# CHECK: $x9 = MRS 58880
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# CHECK-NEXT: renamable $x8 = MRS 55840
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# CHECK-NEXT: STPWi $w9, killed renamable $w8, killed renamable $x0, 0 :: (store (s32))
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# CHECK-NEXT: RET undef $lr
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name: test5
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1
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renamable $x8 = MRS 58880, implicit-def $nzcv
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STRWui renamable $w8, renamable $x0, 0, implicit killed $x8 :: (store (s32))
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renamable $x8 = MRS 55840, implicit-def $nzcv
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STRWui killed renamable $w8, renamable killed $x0, 1, implicit killed $x8 :: (store (s32))
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RET undef $lr
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...
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---
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# CHECK-LABEL: name: test6
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# CHECK-LABEL: bb.0:
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# CHECK: liveins: $x0, $x1, $q3
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# CHECK: renamable $q9 = LDRQui $x0, 0 :: (load (s128))
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# CHECK-NEXT: renamable $q9 = XTNv8i16 renamable $q9, killed renamable $q3
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# CHECK-NEXT: STRQui renamable $q9, renamable $x0, 11 :: (store (s128), align 4)
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# CHECK-NEXT: renamable $q9 = FADDv2f64 renamable $q9, renamable $q9
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# CHECK-NEXT: STRQui renamable $q9, renamable $x0, 10 :: (store (s128), align 4)
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# CHECK-NEXT: RET undef $lr
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# XTN has a tied use-def.
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name: test6
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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- { reg: '$q3' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $q3
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renamable $q9 = LDRQui $x0, 0 :: (load (s128))
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renamable $q9 = XTNv8i16 renamable $q9, killed renamable $q3
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STRQui renamable $q9, renamable $x0, 11 :: (store (s128), align 4)
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renamable $q9 = FADDv2f64 renamable $q9, renamable $q9
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STRQui renamable $q9, renamable $x0, 10 :: (store (s128), align 4)
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RET undef $lr
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...
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---
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# Currently we do not rename across frame-setup instructions.
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# CHECK-LABEL: name: test7
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# CHECK-LABEL: bb.0:
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# CHECK-NEXT: liveins: $x0, $x1
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# CHECK: $sp = frame-setup SUBXri $sp, 64, 0
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# CHECK-NEXT: renamable $x9 = frame-setup LDRXui renamable $x0, 0 :: (load (s64))
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# CHECK-NEXT: STRXui renamable $x9, $x0, 10 :: (store (s64), align 4)
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# CHECK-NEXT: renamable $x9 = LDRXui renamable $x0, 1 :: (load (s64))
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# CHECK-NEXT: STRXui renamable $x9, $x0, 11 :: (store (s64), align 4)
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# CHECK-NEXT: RET undef $lr
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#
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name: test7
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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frameInfo:
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stackSize: 64
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maxAlignment: 16
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adjustsStack: true
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hasCalls: true
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maxCallFrameSize: 0
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stack:
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- { id: 0, type: spill-slot, offset: -48, size: 16, alignment: 16 }
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- { id: 1, type: spill-slot, offset: -64, size: 16, alignment: 16 }
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1
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$sp = frame-setup SUBXri $sp, 64, 0
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renamable $x9 = frame-setup LDRXui renamable $x0, 0 :: (load (s64))
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STRXui renamable $x9, $x0, 10 :: (store (s64), align 4)
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renamable $x9 = LDRXui renamable $x0, 1 :: (load (s64))
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STRXui renamable $x9, $x0, 11 :: (store (s64), align 4)
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RET undef $lr
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...
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---
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# CHECK-LABEL: name: test8
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# CHECK-LABEL: bb.0:
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# CHECK-NEXT: liveins: $x0, $x1
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# CHECK: renamable $x8 = MRS 58880
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# CHECK-NEXT: $w9 = ORRWrs $wzr, killed renamable $w8, 0, implicit-def $x9
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# CHECK-NEXT: renamable $x8 = MRS 55840
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# CHECK-NEXT: STPWi $w9, killed renamable $w8, killed renamable $x0, 0 :: (store (s32))
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# CHECK-NEXT: RET undef $lr
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name: test8
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1
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renamable $x8 = MRS 58880, implicit-def $nzcv
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renamable $w8 = ORRWrs $wzr, killed renamable $w8, 0, implicit-def $x8
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STRWui renamable $w8, renamable $x0, 0, implicit killed $x8 :: (store (s32))
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renamable $x8 = MRS 55840, implicit-def $nzcv
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STRWui killed renamable $w8, renamable killed $x0, 1, implicit killed $x8 :: (store (s32))
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RET undef $lr
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...
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---
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# The reg class returned for $q9 contains only the first 16 Q registers.
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# TODO: Can we check that all instructions that require renaming also support
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# the second 16 Q registers?
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# CHECK-LABEL: name: test9
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# CHECK-LABEL: bb.0:
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# CHECK: liveins: $x0, $x1, $q0, $q1, $q2, $q3, $q4, $q5, $q6, $q7
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# CHECK: renamable $q9 = LDRQui $x0, 0 :: (load (s128))
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# CHECK-NEXT: STRQui killed renamable $q9, renamable $x0, 10 :: (store (s128), align 4)
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# CHECK: renamable $q9 = LDRQui $x0, 1 :: (load (s128))
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# CHECK-NEXT: STRQui renamable $q9, renamable $x0, 11 :: (store (s128), align 4)
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# CHECK-NEXT: RET undef $lr
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name: test9
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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- { reg: '$q3' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $q0, $q1, $q2, $q3, $q4, $q5, $q6, $q7
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renamable $q9 = LDRQui $x0, 0 :: (load (s128))
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STRQui renamable killed $q9, renamable $x0, 10 :: (store (s128), align 4)
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renamable $q9 = LDRQui $x0, 1 :: (load (s128))
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STRQui renamable $q9, renamable $x0, 11 :: (store (s128), align 4)
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RET undef $lr
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...
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---
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# The livein $q7 is killed early, so we can re-use it for renaming.
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# CHECK-LABEL: name: test10
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# CHECK-LABEL: bb.0:
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# CHECK: liveins: $x0, $x1, $q0, $q1, $q2, $q3, $q4, $q5, $q6, $q7
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# CHECK: renamable $q7 = FADDv2f64 renamable $q7, renamable $q7
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# CHECK-NEXT: STRQui killed renamable $q7, renamable $x0, 100 :: (store (s128), align 4)
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# CHECK-NEXT: $q7 = LDRQui $x0, 0 :: (load (s128))
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# CHECK-NEXT: renamable $q9 = LDRQui $x0, 1 :: (load (s128))
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# CHECK-NEXT: STPQi killed renamable $q9, killed $q7, renamable $x0, 10 :: (store (s128), align 4)
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# CHECK-NEXT: RET undef $lr
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name: test10
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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- { reg: '$q3' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $q0, $q1, $q2, $q3, $q4, $q5, $q6, $q7
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renamable $q7 = FADDv2f64 renamable $q7, renamable $q7
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STRQui renamable killed $q7, renamable $x0, 100 :: (store (s128), align 4)
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renamable $q9 = LDRQui $x0, 0 :: (load (s128))
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STRQui renamable killed $q9, renamable $x0, 11 :: (store (s128), align 4)
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renamable $q9 = LDRQui $x0, 1 :: (load (s128))
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STRQui renamable killed $q9, renamable $x0, 10 :: (store (s128), align 4)
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RET undef $lr
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...
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---
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# Make sure we do not use any registers that are defined between paired candidates
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# ($x14 in this example)
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# CHECK-LABEL: name: test11
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# CHECK: bb.0:
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# CHECK-NEXT: liveins: $x0, $x1, $x11, $x12, $x13
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# CHECK: renamable $w10 = LDRWui renamable $x0, 0 :: (load (s64))
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# CHECK-NEXT: $x18, renamable $x8 = LDPXi renamable $x0, 1 :: (load (s64))
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# CHECK-NEXT: renamable $x9 = LDRXui renamable $x0, 3 :: (load (s64))
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# CHECK-NEXT: renamable $x14 = LDRXui renamable $x0, 5 :: (load (s64))
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# CHECK-NEXT: STPXi renamable $x9, killed $x18, renamable $x0, 10 :: (store (s64), align 4)
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# CHECK-NEXT: STRXui killed renamable $x14, renamable $x0, 200 :: (store (s64), align 4)
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# CHECK-NEXT: renamable $w8 = ADDWrr $w10, $w10
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# CHECK-NEXT: STRWui renamable $w8, renamable $x0, 100 :: (store (s64), align 4)
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# CHECK-NEXT: RET undef $lr
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#
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name: test11
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x11, $x12, $x13
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renamable $w10 = LDRWui renamable $x0, 0 :: (load (s64))
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renamable $x9, renamable $x8 = LDPXi renamable $x0, 1 :: (load (s64))
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STRXui renamable killed $x9, renamable $x0, 11 :: (store (s64), align 4)
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renamable $x9 = LDRXui renamable $x0, 3 :: (load (s64))
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renamable $x14 = LDRXui renamable $x0, 5 :: (load (s64))
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STRXui renamable $x9, renamable $x0, 10 :: (store (s64), align 4)
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STRXui renamable killed $x14, renamable $x0, 200 :: (store (s64), align 4)
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renamable $w8 = ADDWrr $w10, $w10
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STRWui renamable $w8, renamable $x0, 100 :: (store (s64), align 4)
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RET undef $lr
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...
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---
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# Check that we correctly deal with killed registers in stores that get merged forward,
|
|
# which extends the live range of the first store operand.
|
|
# CHECK-LABEL: name: test12
|
|
# CHECK: bb.0:
|
|
# CHECK-NEXT: liveins: $x0, $x1
|
|
#
|
|
# CHECK: renamable $x10 = LDRXui renamable $x0, 0 :: (load (s64))
|
|
# CHECK-NEXT: $x11, renamable $x8 = LDPXi renamable $x0, 3 :: (load (s64))
|
|
# CHECK-NEXT: renamable $x9 = LDRXui renamable $x0, 2 :: (load (s64))
|
|
# CHECK-NEXT: renamable $x8 = ADDXrr $x8, $x8
|
|
# CHECK-NEXT: STPXi renamable $x8, killed $x11, renamable $x0, 10 :: (store (s64), align 4)
|
|
# CHECK-NEXT: STPXi killed renamable $x10, renamable $x9, renamable $x0, 20 :: (store (s64), align 4)
|
|
# CHECK-NEXT: RET undef $lr
|
|
|
|
name: test12
|
|
alignment: 4
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$x0' }
|
|
- { reg: '$x1' }
|
|
- { reg: '$x8' }
|
|
frameInfo:
|
|
maxAlignment: 1
|
|
maxCallFrameSize: 0
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0, $x1
|
|
renamable $x10 = LDRXui renamable $x0, 0 :: (load (s64))
|
|
STRXui renamable killed $x10, renamable $x0, 20 :: (store (s64), align 4)
|
|
renamable $x9, renamable $x8 = LDPXi renamable $x0, 3 :: (load (s64))
|
|
STRXui renamable killed $x9, renamable $x0, 11 :: (store (s64), align 4)
|
|
renamable $x9 = LDRXui renamable $x0, 2 :: (load (s64))
|
|
renamable $x8 = ADDXrr $x8, $x8
|
|
STRXui renamable $x8, renamable $x0, 10 :: (store (s64), align 4)
|
|
STRXui renamable $x9, renamable $x0, 21 :: (store (s64), align 4)
|
|
RET undef $lr
|
|
|
|
...
|
|
---
|
|
# Make sure we do not use any registers that are defined between def to rename and the first
|
|
# paired store. ($x14 in this example)
|
|
# CHECK-LABEL: name: test13
|
|
# CHECK: bb.0:
|
|
# CHECK-NEXT: liveins: $x0, $x1, $x10, $x11, $x12, $x13
|
|
# CHECK: $x18, renamable $x8 = LDPXi renamable $x0, 0 :: (load (s64))
|
|
# CHECK-NEXT: renamable $x14 = LDRXui renamable $x0, 4 :: (load (s64))
|
|
# CHECK-NEXT: STRXui killed renamable $x14, renamable $x0, 100 :: (store (s64), align 4)
|
|
# CHECK-NEXT: renamable $x9 = LDRXui renamable $x0, 2 :: (load (s64))
|
|
# CHECK-NEXT: STPXi renamable $x9, killed $x18, renamable $x0, 10 :: (store (s64), align 4)
|
|
# CHECK-NEXT: RET undef $lr
|
|
#
|
|
name: test13
|
|
alignment: 4
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$x0' }
|
|
- { reg: '$x1' }
|
|
- { reg: '$x8' }
|
|
frameInfo:
|
|
maxAlignment: 1
|
|
maxCallFrameSize: 0
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0, $x1, $x10, $x11, $x12, $x13
|
|
renamable $x9, renamable $x8 = LDPXi renamable $x0, 0 :: (load (s64))
|
|
renamable $x14 = LDRXui renamable $x0, 4 :: (load (s64))
|
|
STRXui renamable killed $x14, renamable $x0, 100 :: (store (s64), align 4)
|
|
STRXui renamable killed $x9, renamable $x0, 11 :: (store (s64), align 4)
|
|
renamable $x9 = LDRXui renamable $x0, 2 :: (load (s64))
|
|
STRXui renamable $x9, renamable $x0, 10 :: (store (s64))
|
|
RET undef $lr
|
|
|
|
...
|
|
# Make sure we do not rename if pseudo-defs. Noop pseudo instructions like KILL
|
|
# may lead to a missing definition of the rename register.
|
|
#
|
|
# CHECK-LABEL: name: test14_pseudo
|
|
# CHECK: bb.0:
|
|
# CHECK-NEXT: liveins: $w8, $fp, $w25
|
|
# CHECK: renamable $w8 = KILL killed renamable $w8, implicit-def $x8
|
|
# CHECK-NEXT: STURXi killed renamable $x8, $fp, -40 :: (store (s64))
|
|
# CHECK-NEXT: $w8 = ORRWrs $wzr, killed $w25, 0, implicit-def $x8
|
|
# CHECK-NEXT: STURXi killed renamable $x8, $fp, -32 :: (store (s64))
|
|
# CHECK-NEXT: RET undef $lr
|
|
#
|
|
name: test14_pseudo
|
|
alignment: 4
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$x0' }
|
|
- { reg: '$x1' }
|
|
- { reg: '$x8' }
|
|
frameInfo:
|
|
maxAlignment: 1
|
|
maxCallFrameSize: 0
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
bb.0:
|
|
liveins: $w8, $fp, $w25
|
|
|
|
renamable $w8 = KILL killed renamable $w8, implicit-def $x8
|
|
STURXi killed renamable $x8, $fp, -40 :: (store (s64))
|
|
$w8 = ORRWrs $wzr, killed $w25, 0, implicit-def $x8
|
|
STURXi killed renamable $x8, $fp, -32 :: (store (s64))
|
|
RET undef $lr
|
|
...
|
|
---
|
|
# Make sure we do not pick a register marked as undef for renaming.
|
|
#
|
|
# CHECK-LABEL: name: test15_undef_op
|
|
# CHECK: bb.0:
|
|
# CHECK-NEXT: liveins: $x0, $x1, $x8
|
|
# CHECK: undef renamable $x10, $x11 = LDPXi renamable $x0, 0 :: (load (s64))
|
|
# CHECK-NEXT: renamable $x9 = LDRXui renamable $x0, 1 :: (load (s64))
|
|
# CHECK-NEXT: STRXui renamable $x9, renamable $x0, 100 :: (store (s64), align 4)
|
|
# CHECK-NEXT: renamable $x10 = ADDXrr $x10, $x10
|
|
# CHECK-NEXT: STPXi renamable $x10, killed $x11, renamable $x0, 10 :: (store (s64), align 4)
|
|
# CHECK-NEXT: RET undef $lr
|
|
#
|
|
name: test15_undef_op
|
|
alignment: 4
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$x0' }
|
|
- { reg: '$x1' }
|
|
- { reg: '$x8' }
|
|
frameInfo:
|
|
maxAlignment: 1
|
|
maxCallFrameSize: 0
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0, $x1, $x8
|
|
renamable undef $x10, renamable $x9 = LDPXi renamable $x0, 0 :: (load (s64))
|
|
STRXui renamable killed $x9, renamable $x0, 11 :: (store (s64), align 4)
|
|
renamable $x9 = LDRXui renamable $x0, 1 :: (load (s64))
|
|
STRXui renamable $x9, renamable $x0, 100 :: (store (s64), align 4)
|
|
renamable $x10 = ADDXrr $x10, $x10
|
|
STRXui renamable $x10, renamable $x0, 10 :: (store (s64), align 4)
|
|
RET undef $lr
|
|
|
|
...
|