Matt Arsenault d6adfb401c AMDGPU: Add cache invalidation instructions. ... These are necessary for implementing mem_fence for OpenCL 2.0. The VI assembler tests are disabled since it seems to be using the wrong encoding or opcode. llvm-svn: 248532		2015-09-24 19:52:21 +00:00
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AArch64	[llvm-readobj] MachO -- correctly dump section field 'Reserved3'	2015-09-01 16:29:02 +00:00
AMDGPU	AMDGPU: Add cache invalidation instructions.	2015-09-24 19:52:21 +00:00
ARM	DI: Require subprogram definitions to be distinct	2015-08-28 20:26:49 +00:00
AsmParser	[MC/AsmParser] Avoid setting MCSymbol.IsUsed in some cases	2015-08-31 17:44:53 +00:00
COFF	Add assembler fatal error for undefined assembler labels in COFF writer	2015-09-16 16:26:29 +00:00
Disassembler	[mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values.	2015-09-18 14:20:54 +00:00
ELF	Make the default triple optional by allowing an empty string	2015-09-16 05:34:32 +00:00
Hexagon	[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.	2015-06-05 16:00:11 +00:00
MachO	[MC] Convert all the remaining tests from macho-dump to llvm-readobj.	2015-09-10 01:50:00 +00:00
Markup	…
Mips	[mips][ias] Implement .cpreturn directive.	2015-09-22 10:50:09 +00:00
PowerPC	Scalar to vector conversions using direct moves	2015-08-13 17:40:44 +00:00
Sparc	[SPARC] Add mulscc.	2015-09-17 20:54:26 +00:00
SystemZ	[SystemZ] Add z13 vector facility and MC support	2015-05-05 19:23:40 +00:00
X86	[X86][AVX512] add masked version for RSQRT14 & RCP14 Scalar FP	2015-09-21 10:23:53 +00:00