forked from OSchip/llvm-project
60 lines
1.8 KiB
ArmAsm
60 lines
1.8 KiB
ArmAsm
// RUN: not llvm-mc -triple i686-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
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.intel_syntax
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// Basic case of ambiguity for inc.
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inc [eax]
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// CHECK: error: ambiguous operand size for instruction 'inc'
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inc dword ptr [eax]
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inc word ptr [eax]
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inc byte ptr [eax]
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// CHECK-NOT: error:
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// Other ambiguous instructions. Anything that doesn't take a register,
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// basically.
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dec [eax]
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// CHECK: error: ambiguous operand size for instruction 'dec'
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mov [eax], 1
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// CHECK: error: ambiguous operand size for instruction 'mov'
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and [eax], 0
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// CHECK: error: ambiguous operand size for instruction 'and'
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or [eax], 1
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// CHECK: error: ambiguous operand size for instruction 'or'
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add [eax], 1
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// CHECK: error: ambiguous operand size for instruction 'add'
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sub [eax], 1
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// CHECK: error: ambiguous operand size for instruction 'sub'
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// gas assumes these instructions are pointer-sized by default, and we follow
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// suit.
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push [eax]
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call [eax]
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jmp [eax]
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// CHECK-NOT: error:
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add byte ptr [eax], eax
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// CHECK: error: invalid operand for instruction
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add byte ptr [eax], eax
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// CHECK: error: invalid operand for instruction
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add rax, 3
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// CHECK: error: register %rax is only available in 64-bit mode
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fadd "?half@?0??bar@@YAXXZ@4NA"
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// CHECK: error: ambiguous operand size for instruction 'fadd'
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// Instruction line with PTR inside check that they don't accept register as memory.
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// CHECK: error: expected memory operand after 'ptr', found register operand instead
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// CHECK: andps xmm1, xmmword ptr xmm1
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andps xmm1, xmmword ptr xmm1
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// CHECK: error: expected memory operand after 'ptr', found register operand instead
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// CHECK: andps xmmword ptr xmm1, xmm1
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andps xmmword ptr xmm1, xmm1
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// CHECK: error: expected memory operand after 'ptr', found register operand instead
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// CHECK: mov dword ptr eax, ebx
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mov dword ptr eax, ebx
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