Tom Stellard 52686e4182 TargetRegisterInfo: Add getRegAsmName() ... Summary: The motivation for this new function is to move an invalid assumption about the relationship between the names of register definitions in tablegen files and their assembly names into TargetRegisterInfo, so that we can begin working on fixing this assumption. The current problem is that if you have a register definition in TableGen like: def MYReg0 : Register<"r0", 0>; The function TargetLowering::getRegForInlineAsmConstraint() derives the assembly name from the tablegen name: "MyReg0" rather than the given assembly name "r0". This is working, because on most targets the tablegen name and the assembly names are case insensitive matches for each other (e.g. def EAX : X86Reg<"eax", ...> getRegAsmName() will allow targets to override this default assumption and return the correct assembly name. Reviewers: echristo, hfinkel Subscribers: SamWot, echristo, hfinkel, llvm-commits Differential Revision: http://reviews.llvm.org/D15614 llvm-svn: 265955		2016-04-11 16:21:12 +00:00
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llvm	TargetRegisterInfo: Add getRegAsmName()	2016-04-11 16:21:12 +00:00
llvm-c	[llvm-c] Expose LLVMContextGetDiagnostic{Handler,Context}	2016-04-08 09:19:02 +00:00