Azharuddin Mohammed 473b75c3d5 Remove CRC32 instructions from AArch64InstrInfo::hasShiftedReg ... Summary: A53 scheduler causes an assertion failure on all CRC instructions: include/llvm/CodeGen/MachineInstr.h:280: const llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int) const: Assertion `i < getNumOperands() && "getOperand() out of range!"' failed. The case statements corresponding to CRC instructions are incorrect and should be removed. Also adding a testcase while on this. Reviewers: t.p.northover, javed.absar, apazos, rengolin Reviewed By: rengolin Subscribers: evandro, aemerson, llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D30274 llvm-svn: 297582		2017-03-12 14:02:32 +00:00
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AArch64	Remove CRC32 instructions from AArch64InstrInfo::hasShiftedReg	2017-03-12 14:02:32 +00:00
AMDGPU	AMDGPU: Remove packf16 intrinsic	2017-03-11 05:51:16 +00:00
ARM	[DAGCombine] Simplify ISD::AND in GetDemandedBits.	2017-03-08 00:56:35 +00:00
AVR	[AVR] Disable integrated assembler for a few tests	2017-02-22 22:41:13 +00:00
BPF	[SDAG] Revert r296476 (and r296486, r296668, r296690).	2017-03-03 10:02:25 +00:00
Generic	Do not verify MachimeDominatorTree if it is not calculated	2017-03-02 12:00:10 +00:00
Hexagon	[RDF] Remove the map of reaching defs from copy propagation	2017-03-10 22:44:24 +00:00
Inputs	…
Lanai	…
MIR	MIRTests: Remove unnecessary 2>&1 redirection	2017-02-22 18:47:41 +00:00
MSP430	[SDAG] Revert r296476 (and r296486, r296668, r296690).	2017-03-03 10:02:25 +00:00
Mips	[mips][msa] Accept more values for constant splats	2017-03-10 13:27:14 +00:00
NVPTX	[NVPTX] Fixed lowering of unaligned loads/stores of f16 scalars and vectors.	2017-03-07 20:33:38 +00:00
PowerPC	Revert "Revert "[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce stack frame size""	2017-03-08 02:41:35 +00:00
SPARC	[Sparc] Check register use with isPhysRegUsed() instead of reg_nodbg_empty()	2017-03-08 15:23:10 +00:00
SystemZ	[SystemZ] Add check VT.isSimple() in canTreateAsByteVector()	2017-03-07 09:49:31 +00:00
Thumb	For Thumb1, lower ADDC/ADDE/SUBC/SUBE via the glueless ARMISD nodes,	2017-03-10 07:40:27 +00:00
Thumb2	[ARM] Remove t2xtpk feature from tests	2017-03-09 15:14:32 +00:00
WebAssembly	[WebAssembly] Convert the remaining unit tests to the new wasm-object-file target.	2017-02-28 23:37:04 +00:00
WinEH	…
X86	[X86] Add vector zext tests.	2017-03-12 13:20:10 +00:00
XCore	[SDAG] Revert r296476 (and r296486, r296668, r296690).	2017-03-03 10:02:25 +00:00