forked from OSchip/llvm-project
b88c81fe0f
This is a code change to add support for changing instruction sequences of the form: load inc/dec of 8/16/32/64 bits store into the appropriate X86 inc/dec through memory instruction: inc[qlwb] / dec[qlwb] The checks that were in X86DAGToDAGISel::Select(SDNode *Node)>>ISD::STORE have been extracted to isLoadIncOrDecStore and reworked to use the better named wrappers for getOperand(unsigned) (e.g. getOffset()) and replaced Chain.getNode() with LoadNode. The comments have also been expanded. llvm-svn: 153617 |
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autoconf | ||
bindings | ||
cmake | ||
docs | ||
examples | ||
include | ||
lib | ||
projects | ||
runtime | ||
test | ||
tools | ||
unittests | ||
utils | ||
.gitignore | ||
CMakeLists.txt | ||
CREDITS.TXT | ||
LICENSE.TXT | ||
LLVMBuild.txt | ||
Makefile | ||
Makefile.common | ||
Makefile.config.in | ||
Makefile.rules | ||
README.txt | ||
configure | ||
llvm.spec.in |
README.txt
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