llvm-project/mlir/test/Conversion
Alex Zinenko c1f719d1a7 [mlir] harden result type verification in llvm.call
The verifier of the llvm.call operation was not checking for mismatches between
the number of operation results and the number of results in the signature of
the callee. Furthermore, it was possible to construct an llvm.call operation
producing an SSA value of !llvm.void type, which should not exist. Add the
verification and treat !llvm.void result type as absence of call results.
Update the GPU conversions to LLVM that were mistakenly assuming that it was
fine for llvm.call to produce values of !llvm.void type and ensure these calls
do not produce results.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D106937
2021-07-28 18:15:56 +02:00
..
AffineToStandard [mlir] support max/min lower/upper bounds in affine.parallel 2021-04-29 13:16:25 +02:00
AsyncToLLVM [mlir] replace llvm.mlir.cast with unrealized_conversion_cast 2021-07-16 15:14:09 +02:00
ComplexToLLVM [mlir] replace llvm.mlir.cast with unrealized_conversion_cast 2021-07-16 15:14:09 +02:00
ComplexToStandard [mlir][Complex]: Add lowerings for AddOp and SubOp from Complex dialect to 2021-07-23 12:43:45 +02:00
GPUCommon [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
GPUToCUDA [mlir] Change test-gpu-to-cubin to derive from SerializeToBlobPass 2021-03-11 10:42:20 +01:00
GPUToNVVM [mlir][nvvm]: Add math::Exp2Op lowering to NVVM. 2021-07-15 13:06:30 +02:00
GPUToROCDL [mlir][rocdl] Add math::Exp2Op lowering to ROCDL 2021-07-15 14:33:04 +02:00
GPUToROCm [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00
GPUToSPIRV [mlir][spirv] Only attach struct offset for required storage classes 2021-04-13 15:30:30 -04:00
GPUToVulkan [mlir] harden result type verification in llvm.call 2021-07-28 18:15:56 +02:00
LinalgToSPIRV [MLIR][SPIRV] Rename `spv.selection` to `spv.mlir.selection`. 2021-03-06 16:05:31 +01:00
LinalgToVector [mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds". 2021-03-31 18:04:22 +09:00
MathToLLVM [mlir] factor math-to-llvm out of standard-to-llvm 2021-07-12 11:09:42 +02:00
MathToLibm [mlir][NFC] Rename MathToLLVM->MathToLibm 2021-05-31 08:41:00 +02:00
MemRefToLLVM Dyanamic shape support for memref reassociation reshape ops 2021-07-19 15:14:36 -07:00
OpenACCToLLVM [mlir][openacc] Conversion of data operands in acc.parallel to LLVM IR dialect 2021-06-07 11:22:20 -04:00
OpenACCToSCF [mlir][openacc] Add conversion for if operand to scf.if for standalone data operation 2021-06-07 12:10:03 -04:00
OpenMPToLLVM [mlir] add support for reductions in OpenMP WsLoopOp 2021-07-09 17:54:20 +02:00
PDLToPDLInterp [NFC][PDL] Fix documentation typo, redundant test 2021-06-23 12:27:12 +05:30
SCFToGPU [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
SCFToOpenMP [MLIR][OpenMP] Pretty printer and parser for omp.wsloop 2021-03-18 13:37:01 +00:00
SCFToSPIRV [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
SCFToStandard [SCF] Handle lowering of Execute region to Standard CFG 2021-07-07 15:27:21 -04:00
SPIRVToLLVM [mlir][spirv] Use SingleBlock + NoTerminator for spv.module 2021-06-09 14:00:06 -04:00
ShapeToStandard [mlir][tensor] Add tensor.dim operation 2021-07-01 10:00:19 +09:00
StandardToLLVM [mlir][LLVM] Revert bareptr calling convention handling as an argument materialization. 2021-07-21 22:06:50 +00:00
StandardToSPIRV [mlir][SPIRV] Add lowering for math.log1p operation to SPIR-V dialect. 2021-06-03 16:27:19 -07:00
TosaToLinalg [mlir][tosa] Quantized Conv2DOp lowering to linalg added. 2021-07-22 15:42:26 -07:00
TosaToSCF [MLIR][TOSA] Resubmit Tosa to Standard/SCF Lowerings (const, if, while)" 2021-02-26 17:44:12 -08:00
TosaToStandard [mlir][NFC] Move SubTensorOp and SubTensorInsertOp to TensorDialect 2021-06-22 17:55:53 +09:00
VectorToGPU [mlir][VectorToGPU] Support converting vetor.broadcast to MMA op 2021-06-30 09:08:55 -07:00
VectorToLLVM [mlir][vector] Remove vector.transfer_read/write to LLVM lowering 2021-07-17 14:07:27 +09:00
VectorToROCDL [mlir] use built-in vector types instead of LLVM dialect types when possible 2021-01-12 10:04:28 +01:00
VectorToSCF [mlir] Support tensor types in unrolled VectorToSCF 2021-06-02 10:44:04 +09:00
VectorToSPIRV [mlir][spirv] add support lowering of extract_slice to scalar type 2021-05-07 07:52:02 -07:00