llvm-project/llvm/test/MC/Mips/mips5
Simon Dardis c4463c942c [mips] Fix sync instruction definition
The 'sync' instruction for MIPS was defined in MIPS-II as taking no operands.
MIPS32 extended the define of 'sync' as taking an optional unsigned 5 bit
immediate.

This patch correct the definition of sync so that it is accepted with an
operand of 0 or no operand for MIPS-II to MIPS-V, and a 5 bit unsigned
immediate for MIPS32 and later revisions.

Additionally a clear error is given when the MIPS32 version of sync is
used when targeting pre MIPS32.

This partially resolves PR/30714.

Thanks to Daniel Sanders for reporting this issue!

Reveiwers: vkalintiris

Differential Revision: https://reviews.llvm.org/D25672

llvm-svn: 284483
2016-10-18 14:42:13 +00:00
..
invalid-mips32.s [mips] Fix sync instruction definition 2016-10-18 14:42:13 +00:00
invalid-mips32r2.s
invalid-mips64.s
invalid-mips64r2-xfail.s
invalid-mips64r2.s [MIPS]Multiple and add instructions for Mips are currently available in mips32r2/mips64r2 and later but should also be available in mips4, mips5, and mips64. This patch fixes the requested features and updates the corresponding test files. 2015-02-25 15:24:37 +00:00
valid-xfail.s Recommit: "[mips] Add rsqrt, recip for MIPS" 2016-10-05 16:11:01 +00:00
valid.s [mips] Fix sync instruction definition 2016-10-18 14:42:13 +00:00