Matt Arsenault 972034bda9 AMDGPU: Fix formatting of 1/2pi immediate ... llvm-svn: 286912		2016-11-15 00:04:33 +00:00
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AArch64	[MC][AArch64] Cleanup end-of-line parsing in AArch64 AsmParser.	2016-11-08 18:31:04 +00:00
AMDGPU	AMDGPU: Fix formatting of 1/2pi immediate	2016-11-15 00:04:33 +00:00
ARM	[ARM] Thumb2 LDR (literal) should accept PC as the destination	2016-11-10 13:20:41 +00:00
AVR	[AVR] Add all of the machine code test suite	2016-11-09 23:46:25 +00:00
AsmParser	[MC] Make llvm-mc fail cleanly on invalid output asm variant.	2016-10-31 18:36:31 +00:00
COFF	Emit S_COMPILE3 record once per TU rather than once per function	2016-11-02 21:30:35 +00:00
Disassembler	[AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmpsd with an immediate larger than 32. Fix the same bug with VLX vcmpps/vcmppd.	2016-11-13 19:58:18 +00:00
ELF	Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.	2016-10-27 23:20:19 +00:00
Hexagon	[Hexagon] Fix disassembler crash after r279255	2016-09-09 21:45:00 +00:00
Lanai	[lanai] Add more tests for assembly of conditional ALU ops	2016-07-11 17:58:16 +00:00
MachO	Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.	2016-10-27 23:20:19 +00:00
Markup	…
Mips	[mips] synci microMIPS instruction definition.	2016-10-24 10:23:59 +00:00
PowerPC	[PPC] add absolute difference altivec instructions and matching intrinsics	2016-10-31 19:47:52 +00:00
Sparc	Don't pass a Reloc::Model to MC.	2016-05-18 11:58:50 +00:00
SystemZ	[SystemZ] Support CL(G)T instructions	2016-11-11 12:48:26 +00:00
X86	[AVX-512] Add suffixless aliases for EVEX encoded vcvtsi2ss/vcvtsi2sd/vcvtusi2ss/vcvtusi2sd. This matches the VEX behavior.	2016-11-14 02:46:58 +00:00