llvm-project/llvm/test/CodeGen
Thomas Lively 2cb27072ce [WebAssembly] Allow multivalue types in block signature operands
Summary:
Renames `ExprType` to the more apt `BlockType` and adds a variant for
multivalue blocks. Currently non-void blocks are only generated at the
end of functions where the block return type needs to agree with the
function return type, and that remains true for multivalue
blocks. That invariant means that the actual signature does not need
to be stored in the block signature `MachineOperand` because it can be
inferred by `WebAssemblyMCInstLower` from the return type of the
parent function. `WebAssemblyMCInstLower` continues to lower block
signature operands to immediates when possible but lowers multivalue
signatures to function type symbols. The AsmParser and Disassembler
are updated to handle multivalue block types as well.

Reviewers: aheejin, dschuff, aardappel

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68889

llvm-svn: 374933
2019-10-15 18:28:22 +00:00
..
AArch64 [DebugInfo] Remove some users of DBG_VALUEs IsIndirect field 2019-10-15 10:46:24 +00:00
AMDGPU [AMDGPU] Support mov dpp with 64 bit operands 2019-10-15 16:41:15 +00:00
ARC
ARM [DebugInfo] Remove some users of DBG_VALUEs IsIndirect field 2019-10-15 10:46:24 +00:00
AVR
BPF [BPF] Remove relocation for patchable externs 2019-10-10 15:33:09 +00:00
Generic Reapply r374743 with a fix for the ocaml binding 2019-10-14 16:15:14 +00:00
Hexagon [ModuloSchedule] removeBranch() *before* creating the trip count condition 2019-10-03 17:10:32 +00:00
Inputs
Lanai [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
MIR [Alignment] Migrate Attribute::getWith(Stack)Alignment 2019-10-15 12:56:24 +00:00
MSP430 [DAGCombiner] add operation legality checks before creating shift ops (PR43542) 2019-10-03 21:34:04 +00:00
Mips [MIPS GlobalISel] Add MSA registers to fprb. Select vector load, store 2019-10-15 09:30:08 +00:00
NVPTX [NVPTX] Restructure shfl instrinsics and add variants that return a predicate. 2019-10-14 16:53:34 +00:00
PowerPC [XCOFF] Output object text section header and symbol entry for program code. 2019-10-15 17:40:41 +00:00
RISCV [RISCV] Support fast calling convention 2019-10-15 02:04:29 +00:00
SPARC
SystemZ [FPEnv] Strict FP tests should use the requisite function attributes. 2019-10-04 17:03:46 +00:00
Thumb (Re)generate various tests. NFC 2019-10-08 16:16:26 +00:00
Thumb2 [ARM] Selection for MVE VMOVN 2019-10-14 15:19:33 +00:00
WebAssembly [WebAssembly] Allow multivalue types in block signature operands 2019-10-15 18:28:22 +00:00
WinCFGuard
WinEH [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
X86 [X86] Make memcmp() use PTEST if possible and also enable AVX1 2019-10-15 17:40:12 +00:00
XCore