forked from OSchip/llvm-project
a0e7325023
This adds support for the compare logical and trap (memory) instructions that were added as part of the miscellaneous instruction extensions feature with zEC12. llvm-svn: 286587 |
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AArch64 | ||
AMDGPU | ||
ARM | ||
AVR | ||
AsmParser | ||
COFF | ||
Disassembler | ||
ELF | ||
Hexagon | ||
Lanai | ||
MachO | ||
Markup | ||
Mips | ||
PowerPC | ||
Sparc | ||
SystemZ | ||
X86 |