forked from OSchip/llvm-project
de5ed0c58e
This adjusts the tests to hopfully pacify the llvm-clang-x86_64-expensive-checks-win buildbot. Unlike many other instructions, these instructions have aliases which take coprocessor registers, gpr register, accumulator (and dsp accumulator) registers, floating point registers, floating point control registers and coprocessor 2 data and control operands. For the moment, these aliases are treated as pseudo instructions which are expanded into the underlying instruction. As a result, disassembling these instructions shows the underlying instruction and not the alias. Reviewers: slthakur, atanasyan Differential Revision: https://reviews.llvm.org/D35253 llvm-svn: 318207 |
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| .. | ||
| dsp | ||
| dspr2 | ||
| eva | ||
| micromips-dsp | ||
| micromips-dspr2 | ||
| micromips-dspr3 | ||
| micromips32r3 | ||
| micromips32r6 | ||
| micromips64r6 | ||
| mips1 | ||
| mips2 | ||
| mips3 | ||
| mips4 | ||
| mips32 | ||
| mips32r2 | ||
| mips32r3 | ||
| mips32r5 | ||
| mips32r6 | ||
| mips64 | ||
| mips64r2 | ||
| mips64r3 | ||
| mips64r5 | ||
| mips64r6 | ||
| msa | ||
| mt | ||
| lit.local.cfg | ||