llvm-project/llvm/test/CodeGen
Matt Arsenault 8ad00d30fa AMDGPU: Match isfinite pattern to class instructions
llvm-svn: 339460
2018-08-10 18:58:41 +00:00
..
AArch64 [SelectionDAG] try harder to convert funnel shift to rotate 2018-08-09 17:26:22 +00:00
AMDGPU AMDGPU: Match isfinite pattern to class instructions 2018-08-10 18:58:41 +00:00
ARC
ARM [ARM] Disallow zexts in ARMCodeGenPrepare 2018-08-10 13:57:13 +00:00
AVR
BPF bpf: add missing RegState to notify MachineInstr verifier necessary register usage 2018-07-27 16:58:52 +00:00
Generic [DWARF] Unclamp line table version on Darwin for v5 and later. 2018-08-08 21:16:50 +00:00
Hexagon [Hexagon] Map ISD::TRAP to J2_trap0(#0) 2018-08-09 18:03:45 +00:00
Inputs
Lanai
MIR [DebugInfo][X86] Add start-after flags to MIR tests 2018-07-12 14:36:48 +00:00
MSP430
Mips [mips] Handle branch expansion corner cases 2018-08-07 10:45:45 +00:00
NVPTX [NVPTX] Select atomic loads and stores 2018-08-09 07:45:49 +00:00
Nios2
PowerPC [SelectionDAG] try harder to convert funnel shift to rotate 2018-08-09 17:26:22 +00:00
RISCV [RISCV] Fixed test case failure due to r338047 2018-07-31 00:36:28 +00:00
SPARC Regenerate remainder test. 2018-07-20 13:14:29 +00:00
SystemZ [SystemZ] Improve handling of instructions which expand to several groups 2018-08-03 10:43:05 +00:00
Thumb [ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1. 2018-07-25 18:22:22 +00:00
Thumb2 [ARM] Treat cmn immediates as legal in isLegalICmpImmediate. 2018-07-10 23:44:37 +00:00
WebAssembly [WebAssembly] Gate i64x2 and f64x2 on -wasm-enable-unimplemented 2018-08-09 23:58:51 +00:00
WinCFGuard Rename the cfguard module flag to cfguardtable 2018-08-10 09:48:53 +00:00
WinEH
X86 [X86] Qualify one of the heuristics in combineMul to only apply to positive multiply amounts. 2018-08-09 23:27:42 +00:00
XCore [DAGCombiner] extend(ifpositive(X)) -> shift-right (not X) 2018-07-15 16:27:07 +00:00