.. |
AArch64
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[SelectionDAG] try harder to convert funnel shift to rotate
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2018-08-09 17:26:22 +00:00 |
AMDGPU
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AMDGPU: Match isfinite pattern to class instructions
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2018-08-10 18:58:41 +00:00 |
ARC
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…
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ARM
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[ARM] Disallow zexts in ARMCodeGenPrepare
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2018-08-10 13:57:13 +00:00 |
AVR
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…
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BPF
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bpf: add missing RegState to notify MachineInstr verifier necessary register usage
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2018-07-27 16:58:52 +00:00 |
Generic
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[DWARF] Unclamp line table version on Darwin for v5 and later.
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2018-08-08 21:16:50 +00:00 |
Hexagon
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[Hexagon] Map ISD::TRAP to J2_trap0(#0)
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2018-08-09 18:03:45 +00:00 |
Inputs
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…
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Lanai
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…
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MIR
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[DebugInfo][X86] Add start-after flags to MIR tests
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2018-07-12 14:36:48 +00:00 |
MSP430
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…
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Mips
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[mips] Handle branch expansion corner cases
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2018-08-07 10:45:45 +00:00 |
NVPTX
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[NVPTX] Select atomic loads and stores
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2018-08-09 07:45:49 +00:00 |
Nios2
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…
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PowerPC
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[SelectionDAG] try harder to convert funnel shift to rotate
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2018-08-09 17:26:22 +00:00 |
RISCV
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[RISCV] Fixed test case failure due to r338047
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2018-07-31 00:36:28 +00:00 |
SPARC
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Regenerate remainder test.
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2018-07-20 13:14:29 +00:00 |
SystemZ
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[SystemZ] Improve handling of instructions which expand to several groups
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2018-08-03 10:43:05 +00:00 |
Thumb
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[ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1.
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2018-07-25 18:22:22 +00:00 |
Thumb2
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[ARM] Treat cmn immediates as legal in isLegalICmpImmediate.
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2018-07-10 23:44:37 +00:00 |
WebAssembly
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[WebAssembly] Gate i64x2 and f64x2 on -wasm-enable-unimplemented
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2018-08-09 23:58:51 +00:00 |
WinCFGuard
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Rename the cfguard module flag to cfguardtable
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2018-08-10 09:48:53 +00:00 |
WinEH
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…
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X86
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[X86] Qualify one of the heuristics in combineMul to only apply to positive multiply amounts.
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2018-08-09 23:27:42 +00:00 |
XCore
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[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
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2018-07-15 16:27:07 +00:00 |