forked from OSchip/llvm-project
86 lines
2.3 KiB
ArmAsm
86 lines
2.3 KiB
ArmAsm
# RUN: llvm-mc -triple=i686-linux -filetype=obj %s -o - | \
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# RUN: llvm-objdump -d --no-show-raw-insn -r - | FileCheck %s
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# RUN: llvm-mc -triple=i686-nacl -filetype=obj %s -o - | \
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# RUN: llvm-objdump -d --no-show-raw-insn -r - | FileCheck %s
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# RUN: llvm-mc -triple=i686-nacl -filetype=obj -mc-relax-all %s -o - | \
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# RUN: llvm-objdump -d --no-show-raw-insn -r - | FileCheck %s
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.bundle_align_mode 5
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.text
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.globl main
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.align 32, 0x90
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.type main,@function
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main: # @main
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# CHECK-LABEL: <main>:
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# Call + pop sequence for determining the PIC base.
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.bundle_lock align_to_end
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calll .L0$pb
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.bundle_unlock
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.L0$pb:
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popl %eax
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# CHECK: 20: popl
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# 26 bytes of instructions between the pop and the use of the pic base symbol.
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movl $3, 2(%ebx, %ebx)
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movl $3, 2(%ebx, %ebx)
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movl $3, 2(%ebx, %ebx)
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hlt
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hlt
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# CHECK: nop
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.Ltmp0:
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addl (.Ltmp0-.L0$pb), %eax
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# The addl has bundle padding to push it from 0x3b to 0x40.
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# The difference between the labels should be 0x20 (0x40-0x20) not 0x1b
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# (0x3b-0x20)
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# CHECK: 40: addl 32, %eax
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popl %ecx
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jmp *%ecx
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# Also make sure it works with a non-relaxable instruction (cmp vs add)
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# and for 2 adjacent labels that both point to the correct instruction
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.section .text.bar, "ax"
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.globl bar
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.align 32, 0x90
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.type bar,@function
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bar:
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# CHECK-LABEL: bar:
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.bundle_lock align_to_end
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calll .L1$pb
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.bundle_unlock
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.L1$pb:
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popl %eax
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# CHECK: 20: popl
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# 26 bytes of instructions between the pop and the use of the pic base symbol.
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movl $3, 2(%ebx, %ebx)
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movl $3, 2(%ebx, %ebx)
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movl $3, 2(%ebx, %ebx)
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hlt
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hlt
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# CHECK: nop
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.Ltmp1:
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.Ltmp2:
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cmpl %eax, .Ltmp1
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# CHECK: 40: cmpl %eax, 64
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cmpl %eax, (.Ltmp2-.L1$pb)
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# CHECK: 46: cmpl %eax, 32
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popl %ecx
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jmp *%ecx
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# Switch sections in the middle of a function
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.section .text.foo, "ax"
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.globl foo
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.align 32, 0x90
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.type foo,@function
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# CHECK-LABEL: foo:
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foo:
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inc %eax
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tmp3:
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.rodata
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.type obj,@object
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.comm obj,4,4
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.section .text.foo
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inc %eax
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# CHECK: <tmp3>:
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# CHECK-NEXT: 1: incl
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