forked from OSchip/llvm-project
124 lines
5.1 KiB
LLVM
124 lines
5.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \
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; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \
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; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-BE
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declare <512 x i1> @llvm.ppc.mma.xvf16ger2pp(<512 x i1>, <16 x i8>, <16 x i8>)
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declare <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
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declare void @foo()
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define void @intrinsics1(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc3, <16 x i8> %vc4, i8* %ptr) {
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; CHECK-LABEL: intrinsics1:
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; CHECK: .localentry intrinsics1, 1
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; CHECK-NEXT: # %bb.0:
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: .cfi_def_cfa_offset 176
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: .cfi_offset r30, -16
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; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-NEXT: std r0, 16(r1)
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; CHECK-NEXT: stdu r1, -176(r1)
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; CHECK-NEXT: li r3, 128
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; CHECK-NEXT: # kill: def $v5 killed $v5 killed $vsrp18 def $vsrp18
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; CHECK-NEXT: # kill: def $v4 killed $v4 killed $vsrp18 def $vsrp18
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; CHECK-NEXT: # kill: def $v3 killed $v3 killed $vsrp17 def $vsrp17
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; CHECK-NEXT: # kill: def $v2 killed $v2 killed $vsrp17 def $vsrp17
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; CHECK-NEXT: xxlor vs0, v2, v2
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; CHECK-NEXT: xxlor vs1, v3, v3
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; CHECK-NEXT: ld r30, 272(r1)
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; CHECK-NEXT: stxvp vsp34, r1(r3) # 32-byte Folded Spill
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; CHECK-NEXT: li r3, 96
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; CHECK-NEXT: xxlor vs2, v4, v4
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; CHECK-NEXT: xxlor vs3, v5, v5
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; CHECK-NEXT: stxvp vsp36, r1(r3) # 32-byte Folded Spill
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; CHECK-NEXT: xxmtacc acc0
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; CHECK-NEXT: li r3, 64
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; CHECK-NEXT: xvf16ger2pp acc0, v2, v4
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; CHECK-NEXT: xxmfacc acc0
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; CHECK-NEXT: stxvp vsp0, r1(r3)
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; CHECK-NEXT: li r3, 32
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; CHECK-NEXT: stxvp vsp2, r1(r3)
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; CHECK-NEXT: bl foo@notoc
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; CHECK-NEXT: li r3, 64
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; CHECK-NEXT: lxvp vsp0, r1(r3)
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; CHECK-NEXT: li r3, 32
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; CHECK-NEXT: lxvp vsp2, r1(r3)
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; CHECK-NEXT: li r3, 128
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; CHECK-NEXT: lxvp vsp34, r1(r3) # 32-byte Folded Reload
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; CHECK-NEXT: li r3, 96
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; CHECK-NEXT: lxvp vsp36, r1(r3) # 32-byte Folded Reload
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; CHECK-NEXT: xxmtacc acc0
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; CHECK-NEXT: xvf16ger2pp acc0, v2, v4
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; CHECK-NEXT: xxmfacc acc0
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; CHECK-NEXT: stxv vs0, 48(r30)
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; CHECK-NEXT: stxv vs1, 32(r30)
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; CHECK-NEXT: stxv vs2, 16(r30)
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; CHECK-NEXT: stxvx vs3, 0, r30
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; CHECK-NEXT: addi r1, r1, 176
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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;
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; CHECK-BE-LABEL: intrinsics1:
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; CHECK-BE: # %bb.0:
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; CHECK-BE-NEXT: mflr r0
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; CHECK-BE-NEXT: std r0, 16(r1)
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; CHECK-BE-NEXT: stdu r1, -256(r1)
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; CHECK-BE-NEXT: .cfi_def_cfa_offset 256
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; CHECK-BE-NEXT: .cfi_offset lr, 16
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; CHECK-BE-NEXT: .cfi_offset r30, -16
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; CHECK-BE-NEXT: li r3, 208
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; CHECK-BE-NEXT: std r30, 240(r1) # 8-byte Folded Spill
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; CHECK-BE-NEXT: # kill: def $v5 killed $v5 killed $vsrp18 def $vsrp18
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; CHECK-BE-NEXT: # kill: def $v4 killed $v4 killed $vsrp18 def $vsrp18
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; CHECK-BE-NEXT: # kill: def $v3 killed $v3 killed $vsrp17 def $vsrp17
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; CHECK-BE-NEXT: # kill: def $v2 killed $v2 killed $vsrp17 def $vsrp17
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; CHECK-BE-NEXT: xxlor vs0, v2, v2
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; CHECK-BE-NEXT: ld r30, 368(r1)
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; CHECK-BE-NEXT: stxvp vsp34, r1(r3) # 32-byte Folded Spill
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; CHECK-BE-NEXT: xxlor vs1, v3, v3
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; CHECK-BE-NEXT: li r3, 176
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; CHECK-BE-NEXT: xxlor vs2, v4, v4
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; CHECK-BE-NEXT: xxlor vs3, v5, v5
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; CHECK-BE-NEXT: stxvp vsp36, r1(r3) # 32-byte Folded Spill
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; CHECK-BE-NEXT: xxmtacc acc0
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; CHECK-BE-NEXT: li r3, 112
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; CHECK-BE-NEXT: xvf16ger2pp acc0, v2, v4
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; CHECK-BE-NEXT: xxmfacc acc0
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; CHECK-BE-NEXT: stxvp vsp0, r1(r3)
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; CHECK-BE-NEXT: li r3, 144
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; CHECK-BE-NEXT: stxvp vsp2, r1(r3)
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; CHECK-BE-NEXT: bl foo
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; CHECK-BE-NEXT: nop
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; CHECK-BE-NEXT: li r3, 112
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; CHECK-BE-NEXT: lxvp vsp0, r1(r3)
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; CHECK-BE-NEXT: li r3, 144
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; CHECK-BE-NEXT: lxvp vsp2, r1(r3)
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; CHECK-BE-NEXT: li r3, 208
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; CHECK-BE-NEXT: lxvp vsp34, r1(r3) # 32-byte Folded Reload
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; CHECK-BE-NEXT: li r3, 176
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; CHECK-BE-NEXT: lxvp vsp36, r1(r3) # 32-byte Folded Reload
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; CHECK-BE-NEXT: xxmtacc acc0
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; CHECK-BE-NEXT: xvf16ger2pp acc0, v2, v4
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; CHECK-BE-NEXT: xxmfacc acc0
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; CHECK-BE-NEXT: stxv vs1, 16(r30)
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; CHECK-BE-NEXT: stxvx vs0, 0, r30
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; CHECK-BE-NEXT: stxv vs3, 48(r30)
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; CHECK-BE-NEXT: stxv vs2, 32(r30)
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; CHECK-BE-NEXT: ld r30, 240(r1) # 8-byte Folded Reload
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; CHECK-BE-NEXT: addi r1, r1, 256
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; CHECK-BE-NEXT: ld r0, 16(r1)
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; CHECK-BE-NEXT: mtlr r0
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; CHECK-BE-NEXT: blr
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%1 = tail call <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc3, <16 x i8> %vc4)
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%2 = tail call <512 x i1> @llvm.ppc.mma.xvf16ger2pp(<512 x i1> %1, <16 x i8> %vc1, <16 x i8> %vc3)
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tail call void @foo()
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%3 = tail call <512 x i1> @llvm.ppc.mma.xvf16ger2pp(<512 x i1> %2, <16 x i8> %vc1, <16 x i8> %vc3)
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%4 = bitcast i8* %ptr to <512 x i1>*
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store <512 x i1> %3, <512 x i1>* %4, align 64
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ret void
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}
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