forked from OSchip/llvm-project
64 lines
1.9 KiB
C++
64 lines
1.9 KiB
C++
//===- ARMLegalizerInfo.cpp --------------------------------------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for ARM.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "ARMLegalizerInfo.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Target/TargetOpcodes.h"
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using namespace llvm;
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#ifndef LLVM_BUILD_GLOBAL_ISEL
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#error "You shouldn't build this"
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#endif
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ARMLegalizerInfo::ARMLegalizerInfo() {
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using namespace TargetOpcode;
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const LLT p0 = LLT::pointer(0, 32);
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const LLT s1 = LLT::scalar(1);
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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setAction({G_FRAME_INDEX, p0}, Legal);
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for (auto Ty : {s1, s8, s16, s32, p0})
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setAction({G_LOAD, Ty}, Legal);
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setAction({G_LOAD, 1, p0}, Legal);
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// FIXME: This is strictly for loading double-precision floating point values,
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// if the hardware allows it. We rely on the instruction selector to complain
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// otherwise.
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setAction({G_LOAD, s64}, Legal);
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for (auto Ty : {s1, s8, s16, s32})
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setAction({G_ADD, Ty}, Legal);
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for (unsigned Op : {G_SEXT, G_ZEXT}) {
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setAction({Op, s32}, Legal);
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for (auto Ty : {s1, s8, s16})
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setAction({Op, 1, Ty}, Legal);
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}
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// FIXME: This is a bit sloppy, but for now we'll just rely on the instruction
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// selector to complain if it doesn't support floating point.
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setAction({G_FADD, s32}, Legal);
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setAction({G_FADD, s64}, Legal);
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computeTables();
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}
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