forked from OSchip/llvm-project
40 lines
1.8 KiB
YAML
40 lines
1.8 KiB
YAML
# RUN: llc -march=hexagon -verify-machineinstrs -run-pass prologepilog -o - %s | FileCheck %s
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# The PS_vstorerw_ai of W0 would normally expand into stores of V0 and V1,
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# but both are clobbered by the regmask. Only V0 is re-defined before the
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# store, so only V0 should be stored. LivePhysRegs didn't correctly remove
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# registers clobbered by regmasks, so V1 also appeared to be live and was
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# stored as well. This resulted in the "using undefined physical register"
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# error.
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# This will fail to compile with -verify-machineinstrs, but we can also check
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# directly if the output is correct.
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# CHECK: J2_call &__hexagon_divsi3
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# CHECK: $v0 = V6_lvsplatw
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# CHECK: V6_vS32b_ai $r29, 128, {{.*}} $v0
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# CHECK-NOT: V6_vS32b_ai $r29, 192, {{.*}} $v1
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name: f0
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tracksRegLiveness: true
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stack:
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- { id: 0, offset: 0, size: 128, alignment: 128 }
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- { id: 1, offset: 128, size: 128, alignment: 128 }
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- { id: 2, offset: 384, size: 128, alignment: 128 }
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body: |
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bb.0:
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renamable $r0 = PS_fi %stack.0, 0
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ADJCALLSTACKDOWN 0, 0, implicit-def $r29, implicit-def dead $r30, implicit $r31, implicit $r30, implicit $r29
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renamable $w0 = PS_vloadrw_ai %stack.2, 0 :: (load 128 from %stack.2)
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V6_vS32b_ai killed renamable $r0, 0, renamable $v1 :: (store 64 into %stack.0, align 128)
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$r0 = A2_tfrsi 0
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renamable $r1 = L2_loadri_io %stack.0, 4 :: (load 4 from %stack.0 + 4)
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J2_call &__hexagon_divsi3, hexagoncsr, implicit-def dead $pc, implicit-def dead $r31, implicit $r29, implicit killed $r0, implicit killed $r1, implicit-def $r29, implicit-def $r0
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ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, implicit $r29
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renamable $v0 = V6_lvsplatw killed renamable $r0
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PS_vstorerw_ai %stack.1, 0, killed renamable $w0 :: (store 128 into %stack.1)
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...
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