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Walter Lee cdbb207bd1 [asan] Add instrumentation support for Myriad 
1. Define Myriad-specific ASan constants.

2. Add code to generate an outer loop that checks that the address is
   in DRAM range, and strip the cache bit from the address.  The
   former is required because Myriad has no memory protection, and it
   is up to the instrumentation to range-check before using it to
   index into the shadow memory.

3. Do not add an unreachable instruction after the error reporting
   function; on Myriad such function may return if the run-time has
   not been initialized.

4. Add a test.

Differential Revision: https://reviews.llvm.org/D46451

llvm-svn: 332692
 		2018-05-18 04:10:38 +00:00
..
Analysis Revert r332657: "[AA] cfl-anders-aa with field sensitivity" 2018-05-17 21:56:39 +00:00
Assembler [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Bindings [LLVM-C] Add Bindings For Module Flags 2018-05-14 08:09:00 +00:00
Bitcode [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
BugPoint
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CodeGen [MachineOutliner] Count savings from outlining in bytes. 2018-05-18 01:52:16 +00:00
DebugInfo Revert "Temporarily revert "[DEBUG] Initial adaptation of NVPTX target for debug info emission."" 2018-05-18 03:13:08 +00:00
Examples
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ExecutionEngine [RuntimeDyld][MachO] Properly handle thumb to thumb calls within a section. 2018-05-09 01:38:13 +00:00
Feature
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FileCheck
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Instrumentation [asan] Add instrumentation support for Myriad 2018-05-18 04:10:38 +00:00
Integer
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JitListener [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
LTO [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Linker [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
MC [RISCV] Implement MC layer support for the tail pseudoinstruction 2018-05-17 17:31:27 +00:00
Object [WebAsembly] Update default triple in test files to wasm32-unknown-unkown. 2018-05-10 17:49:11 +00:00
ObjectYAML Resubmit [pdb] Change /DEBUG:GHASH to emit 8 byte hashes." 2018-05-17 22:55:15 +00:00
Other [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
SafepointIRVerifier
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SymbolRewriter
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TableGen [globalisel] Update GlobalISel emitter to match new representation of extending loads 2018-05-05 20:53:24 +00:00
ThinLTO/X86 [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Transforms [LV][VPlan] Build plain CFG with simple VPInstructions for outer loops. 2018-05-17 19:24:47 +00:00
Unit
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Verifier [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
YAMLParser
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tools [llvm-mca][X86] Add CMOV test files 2018-05-17 16:29:12 +00:00
.clang-format
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CMakeLists.txt [tools] Add missing test dependency 2018-05-07 22:00:59 +00:00
TestRunner.sh
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lit.cfg.py [tools] Adjust the lit config for llvm-strip 2018-05-07 21:07:01 +00:00
lit.site.cfg.py.in Remove 'abi-breaking-checks' lit feature. 2018-05-09 12:39:39 +00:00