llvm-project/llvm/test/CodeGen/Mips/tailcall
Stefan Maksimovic dc66ae78c6 [SelectionDAG] Provide adequate register class for RegisterSDNode
When adding operands to machine instructions in case of
RegisterSDNodes, generate a COPY node in case the register class
does not match the one in the instruction definition.

Differental Revision: https://reviews.llvm.org/D35561

llvm-svn: 324733
2018-02-09 13:55:25 +00:00
..
tail-call-arguments-clobber.ll
tailcall-wrong-isa.ll
tailcall.ll [SelectionDAG] Provide adequate register class for RegisterSDNode 2018-02-09 13:55:25 +00:00