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llvm-project/llvm/test/CodeGen
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Craig Topper 80aa2290fb [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.

Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.

Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon

Reviewed By: RKSimon

Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60228

llvm-svn: 357802
 		2019-04-05 19:28:09 +00:00
..
AArch64 [SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC 2019-04-05 14:56:21 +00:00
AMDGPU AMDGPU/GlobalISel: Fix non-power-of-2 select 2019-04-05 14:03:04 +00:00
ARC [ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores. 2019-03-20 20:06:21 +00:00
ARM [SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC 2019-04-05 14:56:21 +00:00
AVR [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
BPF [BPF] add proper multi-dimensional array support 2019-03-28 21:59:49 +00:00
Generic Fix nondeterminism introduced in r353954 2019-03-26 12:18:08 +00:00
Hexagon [Hexagon] Remove fcmp undef from reduced tests 2019-03-29 19:14:52 +00:00
Inputs
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Lanai
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MIR [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
MSP430 [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
Mips [MIPS GlobalISel] Select floating point arithmetic operations 2019-04-03 14:12:59 +00:00
NVPTX [NVPTX] Fix the codegen for llvm.round. 2019-04-01 16:10:26 +00:00
PowerPC [SelectionDAG] Compute known bits of CopyFromReg 2019-04-05 07:44:09 +00:00
RISCV [RISCV] Implement adding a displacement to a BlockAddress 2019-04-05 08:40:57 +00:00
SPARC [SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC 2019-04-05 14:56:21 +00:00
SystemZ [SelectionDAG] Compute known bits of CopyFromReg 2019-04-05 07:44:09 +00:00
Thumb [ARM] Optimize expressions like "return x != 0;" for Thumb1. 2019-04-02 00:01:23 +00:00
Thumb2 [ARM] Add missing memory operands to a bunch of instructions. 2019-03-25 22:42:30 +00:00
WebAssembly [WebAssembly] Add new explicit relocation types for PIC relocations 2019-04-04 17:43:50 +00:00
WinCFGuard
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WinEH Fix invalid target triples in tests. (NFC) 2019-03-04 23:37:41 +00:00
X86 [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
XCore [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00