forked from OSchip/llvm-project
28 lines
1.4 KiB
LLVM
28 lines
1.4 KiB
LLVM
; RUN: llc -O2 -march=hexagon < %s | FileCheck %s --check-prefix=CHECK-TEST1
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; RUN: llc -O2 -march=hexagon < %s | FileCheck %s --check-prefix=CHECK-TEST2
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; RUN: llc -O2 -march=hexagon < %s | FileCheck %s --check-prefix=CHECK-TEST3
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define i32 @main() #0 {
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entry:
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%l = alloca [7 x i32], align 8
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%p_arrayidx45 = bitcast [7 x i32]* %l to i32*
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%vector_ptr = bitcast [7 x i32]* %l to <2 x i32>*
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store <2 x i32> <i32 3, i32 -2>, <2 x i32>* %vector_ptr, align 8
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%p_arrayidx.1 = getelementptr [7 x i32], [7 x i32]* %l, i32 0, i32 2
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%vector_ptr.1 = bitcast i32* %p_arrayidx.1 to <2 x i32>*
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store <2 x i32> <i32 -4, i32 6>, <2 x i32>* %vector_ptr.1, align 8
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%p_arrayidx.2 = getelementptr [7 x i32], [7 x i32]* %l, i32 0, i32 4
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%vector_ptr.2 = bitcast i32* %p_arrayidx.2 to <2 x i32>*
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store <2 x i32> <i32 -8, i32 -10>, <2 x i32>* %vector_ptr.2, align 8
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ret i32 0
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}
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; The instructions seem to be in a different order in the .s file than
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; the corresponding values in the .ll file, so just run the test three
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; times and each time test for a different instruction.
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; CHECK-TEST1: combine(#-2, #3)
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; CHECK-TEST2: combine(#6, #-4)
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; CHECK-TEST3: combine(#-10, #-8)
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attributes #0 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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