forked from OSchip/llvm-project
54 lines
1.5 KiB
LLVM
54 lines
1.5 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 %s
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; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI %s
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; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI %s
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; BFI_INT Definition pattern from ISA docs
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; (y & x) | (z & ~x)
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;
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; R600: {{^}}bfi_def:
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; R600: BFI_INT
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; SI: @bfi_def
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; SI: v_bfi_b32
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define void @bfi_def(i32 addrspace(1)* %out, i32 %x, i32 %y, i32 %z) {
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entry:
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%0 = xor i32 %x, -1
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%1 = and i32 %z, %0
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%2 = and i32 %y, %x
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%3 = or i32 %1, %2
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; SHA-256 Ch function
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; z ^ (x & (y ^ z))
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; R600: {{^}}bfi_sha256_ch:
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; R600: BFI_INT
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; SI: @bfi_sha256_ch
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; SI: v_bfi_b32
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define void @bfi_sha256_ch(i32 addrspace(1)* %out, i32 %x, i32 %y, i32 %z) {
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entry:
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%0 = xor i32 %y, %z
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%1 = and i32 %x, %0
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%2 = xor i32 %z, %1
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store i32 %2, i32 addrspace(1)* %out
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ret void
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}
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; SHA-256 Ma function
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; ((x & z) | (y & (x | z)))
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; R600: {{^}}bfi_sha256_ma:
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; R600: XOR_INT * [[DST:T[0-9]+\.[XYZW]]], KC0[2].Z, KC0[2].W
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; R600: BFI_INT * {{T[0-9]+\.[XYZW]}}, {{[[DST]]|PV\.[XYZW]}}, KC0[3].X, KC0[2].W
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; SI: v_xor_b32_e32 [[DST:v[0-9]+]], {{s[0-9]+, v[0-9]+}}
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; SI: v_bfi_b32 {{v[0-9]+}}, [[DST]], {{s[0-9]+, v[0-9]+}}
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define void @bfi_sha256_ma(i32 addrspace(1)* %out, i32 %x, i32 %y, i32 %z) {
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entry:
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%0 = and i32 %x, %z
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%1 = or i32 %x, %z
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%2 = and i32 %y, %1
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%3 = or i32 %0, %2
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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