forked from OSchip/llvm-project
49 lines
1.0 KiB
LLVM
49 lines
1.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -o - %s | FileCheck %s
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target triple = "arm64--"
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; AArch64InstrInfo::optimizeCondBranch() optimizes the
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; "x = and y, 256; cmp x, 0; br" from an "and; cbnz" to a tbnz instruction.
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; It forgot to clear the a flag resulting in a MachineVerifier complaint.
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;
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; Writing a stable/simple test is tricky since most tbz instructions are already
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; formed in SelectionDAG, optimizeCondBranch() only triggers if the and
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; instruction is in a different block than the conditional jump.
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;
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; CHECK-LABEL: func
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; CHECK-NOT: and
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; CHECK: tbnz
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define void @func() {
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%c0 = icmp sgt i64 0, 0
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br i1 %c0, label %b1, label %b6
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b1:
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br i1 undef, label %b3, label %b2
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b2:
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%v0 = tail call i32 @extfunc()
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br label %b5
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b3:
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%v1 = load i32, i32* undef, align 4
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%v2 = and i32 %v1, 256
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br label %b5
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b5:
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%v3 = phi i32 [ %v2, %b3 ], [ %v0, %b2 ]
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%c1 = icmp eq i32 %v3, 0
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br i1 %c1, label %b8, label %b7
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b6:
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tail call i32 @extfunc()
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ret void
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b7:
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tail call i32 @extfunc()
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ret void
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b8:
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ret void
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}
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declare i32 @extfunc()
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