forked from OSchip/llvm-project
423 lines
17 KiB
YAML
423 lines
17 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s
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---
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name: test_load_global_i32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_i32
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; SI: $vgpr0 = COPY [[LOAD]](s32)
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; VI-LABEL: name: test_load_global_i32
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; VI: $vgpr0 = COPY [[LOAD]](s32)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s32) = G_LOAD %0 :: (load 4, addrspace 1)
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$vgpr0 = COPY %1
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...
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---
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name: test_load_global_i64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_i64
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; SI: $vgpr0 = COPY [[LOAD]](s32)
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; VI-LABEL: name: test_load_global_i64
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; VI: $vgpr0 = COPY [[LOAD]](s32)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s32) = G_LOAD %0 :: (load 4, addrspace 1)
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$vgpr0 = COPY %1
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...
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---
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name: test_load_global_p1
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_p1
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
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; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
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; VI-LABEL: name: test_load_global_p1
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
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; VI: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(p1) = G_LOAD %0 :: (load 8, addrspace 1)
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_load_global_p4
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_p4
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
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; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p4)
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; VI-LABEL: name: test_load_global_p4
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
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; VI: $vgpr0_vgpr1 = COPY [[LOAD]](p4)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(p4) = G_LOAD %0 :: (load 8, addrspace 1)
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_load_global_p3
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_p3
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; SI: $vgpr0 = COPY [[LOAD]](p3)
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; VI-LABEL: name: test_load_global_p3
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; VI: $vgpr0 = COPY [[LOAD]](p3)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(p3) = G_LOAD %0 :: (load 4, addrspace 1)
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$vgpr0 = COPY %1
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...
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---
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name: test_load_global_v2s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_v2s32
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
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; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
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; VI-LABEL: name: test_load_global_v2s32
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
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; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(<2 x s32>) = G_LOAD %0 :: (load 8, addrspace 1)
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_load_global_v2s16
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_v2s16
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; SI: $vgpr0 = COPY [[LOAD]](<2 x s16>)
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; VI-LABEL: name: test_load_global_v2s16
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; VI: $vgpr0 = COPY [[LOAD]](<2 x s16>)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(<2 x s16>) = G_LOAD %0 :: (load 4, addrspace 1)
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$vgpr0 = COPY %1
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...
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---
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name: test_load_global_v3i32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_v3i32
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
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; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
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; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p1) :: (load 4, addrspace 1)
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; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
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; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0
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; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64
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; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>)
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; VI-LABEL: name: test_load_global_v3i32
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1)
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; VI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(<3 x s32>) = G_LOAD %0 :: (load 12, align 4, addrspace 1)
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$vgpr0_vgpr1_vgpr2 = COPY %1
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...
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---
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name: test_ext_load_global_s64_from_1_align1
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_ext_load_global_s64_from_1_align1
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 1, align 4, addrspace 1)
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; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
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; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
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; VI-LABEL: name: test_ext_load_global_s64_from_1_align1
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 1, align 4, addrspace 1)
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; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
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; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s64) = G_LOAD %0 :: (load 1, addrspace 1, align 4)
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_ext_load_global_s64_from_2_align2
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_ext_load_global_s64_from_2_align2
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 2, align 4, addrspace 1)
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; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
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; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
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; VI-LABEL: name: test_ext_load_global_s64_from_2_align2
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 2, align 4, addrspace 1)
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; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
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; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s64) = G_LOAD %0 :: (load 2, addrspace 1, align 4)
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_ext_load_global_s64_from_4_align4
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_ext_load_global_s64_from_4_align4
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
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; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
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; VI-LABEL: name: test_ext_load_global_s64_from_4_align4
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
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; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s64) = G_LOAD %0 :: (load 4, addrspace 1, align 4)
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_ext_load_global_s128_from_4_align4
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_ext_load_global_s128_from_4_align4
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; SI: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[LOAD]](s32)
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; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ANYEXT]](s128)
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; VI-LABEL: name: test_ext_load_global_s128_from_4_align4
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
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; VI: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[LOAD]](s32)
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; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ANYEXT]](s128)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s128) = G_LOAD %0 :: (load 4, addrspace 1, align 4)
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
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...
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---
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name: test_load_global_s96_align4
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_s96_align4
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
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; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
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; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p1) :: (load 4, addrspace 1)
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; SI: [[DEF:%[0-9]+]]:_(s96) = G_IMPLICIT_DEF
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; SI: [[INSERT:%[0-9]+]]:_(s96) = G_INSERT [[DEF]], [[LOAD]](s64), 0
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; SI: [[INSERT1:%[0-9]+]]:_(s96) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64
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; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](s96)
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; VI-LABEL: name: test_load_global_s96_align4
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1)
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; VI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s96) = G_LOAD %0 :: (load 12, addrspace 1, align 4)
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$vgpr0_vgpr1_vgpr2 = COPY %1
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...
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---
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name: test_load_global_s160_align4
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_s160_align4
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
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; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
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; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p1) :: (load 8, align 4, addrspace 1)
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; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; SI: [[GEP1:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C1]](s64)
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; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p1) :: (load 4, addrspace 1)
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; SI: [[DEF:%[0-9]+]]:_(s160) = G_IMPLICIT_DEF
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; SI: [[INSERT:%[0-9]+]]:_(s160) = G_INSERT [[DEF]], [[LOAD]](s64), 0
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; SI: [[INSERT1:%[0-9]+]]:_(s160) = G_INSERT [[INSERT]], [[LOAD1]](s64), 64
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; SI: [[INSERT2:%[0-9]+]]:_(s160) = G_INSERT [[INSERT1]], [[LOAD2]](s32), 128
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; SI: S_NOP 0, implicit [[INSERT2]](s160)
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; VI-LABEL: name: test_load_global_s160_align4
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
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; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; VI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
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; VI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p1) :: (load 8, align 4, addrspace 1)
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; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; VI: [[GEP1:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C1]](s64)
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; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p1) :: (load 4, addrspace 1)
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; VI: [[DEF:%[0-9]+]]:_(s160) = G_IMPLICIT_DEF
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; VI: [[INSERT:%[0-9]+]]:_(s160) = G_INSERT [[DEF]], [[LOAD]](s64), 0
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; VI: [[INSERT1:%[0-9]+]]:_(s160) = G_INSERT [[INSERT]], [[LOAD1]](s64), 64
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; VI: [[INSERT2:%[0-9]+]]:_(s160) = G_INSERT [[INSERT1]], [[LOAD2]](s32), 128
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; VI: S_NOP 0, implicit [[INSERT2]](s160)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s160) = G_LOAD %0 :: (load 20, addrspace 1, align 4)
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S_NOP 0, implicit %1
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...
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---
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name: test_load_global_s224_align4
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_s224_align4
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
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; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
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; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p1) :: (load 8, align 4, addrspace 1)
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; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; SI: [[GEP1:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C1]](s64)
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; SI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[GEP1]](p1) :: (load 8, align 4, addrspace 1)
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; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
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; SI: [[GEP2:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C2]](s64)
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; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[GEP2]](p1) :: (load 4, addrspace 1)
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; SI: [[DEF:%[0-9]+]]:_(s224) = G_IMPLICIT_DEF
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; SI: [[INSERT:%[0-9]+]]:_(s224) = G_INSERT [[DEF]], [[LOAD]](s64), 0
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; SI: [[INSERT1:%[0-9]+]]:_(s224) = G_INSERT [[INSERT]], [[LOAD1]](s64), 64
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; SI: [[INSERT2:%[0-9]+]]:_(s224) = G_INSERT [[INSERT1]], [[LOAD2]](s64), 128
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; SI: [[INSERT3:%[0-9]+]]:_(s224) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 192
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; SI: [[DEF1:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF
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; SI: [[INSERT4:%[0-9]+]]:_(s256) = G_INSERT [[DEF1]], [[INSERT3]](s224), 0
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; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT4]](s256)
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; VI-LABEL: name: test_load_global_s224_align4
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
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; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; VI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
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; VI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p1) :: (load 8, align 4, addrspace 1)
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; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; VI: [[GEP1:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C1]](s64)
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; VI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[GEP1]](p1) :: (load 8, align 4, addrspace 1)
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; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
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; VI: [[GEP2:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C2]](s64)
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; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[GEP2]](p1) :: (load 4, addrspace 1)
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; VI: [[DEF:%[0-9]+]]:_(s224) = G_IMPLICIT_DEF
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; VI: [[INSERT:%[0-9]+]]:_(s224) = G_INSERT [[DEF]], [[LOAD]](s64), 0
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; VI: [[INSERT1:%[0-9]+]]:_(s224) = G_INSERT [[INSERT]], [[LOAD1]](s64), 64
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; VI: [[INSERT2:%[0-9]+]]:_(s224) = G_INSERT [[INSERT1]], [[LOAD2]](s64), 128
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; VI: [[INSERT3:%[0-9]+]]:_(s224) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 192
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; VI: [[DEF1:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF
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; VI: [[INSERT4:%[0-9]+]]:_(s256) = G_INSERT [[DEF1]], [[INSERT3]](s224), 0
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; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT4]](s256)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s224) = G_LOAD %0 :: (load 28, addrspace 1, align 4)
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%2:_(s256) = G_IMPLICIT_DEF
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%3:_(s256) = G_INSERT %2, %1, 0
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$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %3
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...
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---
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name: test_load_global_v3s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_load_global_v3s32
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; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p1) :: (load 8, align 16, addrspace 1)
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; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
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; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p1) :: (load 4, align 8, addrspace 1)
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; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
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; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0
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; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64
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; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>)
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; VI-LABEL: name: test_load_global_v3s32
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1)
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; VI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(<3 x s32>) = G_LOAD %0 :: (load 12, addrspace 1, align 16)
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$vgpr0_vgpr1_vgpr2 = COPY %1
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...
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---
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name: test_load_constant_v8i32
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: test_load_global_v8i32
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; CHECK: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr0_sgpr1
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; CHECK: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4)
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; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 = COPY [[LOAD]](<8 x s32>)
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%0:_(p4) = COPY $sgpr0_sgpr1
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%1:_(<8 x s32>) = G_LOAD %0 :: (load 32, addrspace 4)
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$sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 = COPY %1
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...
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---
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name: test_load_constant_v16i32
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: test_load_global_v16i32
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; CHECK: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr0_sgpr1
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; CHECK: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 64, addrspace 4)
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; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY [[LOAD]](<16 x s32>)
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%0:_(p4) = COPY $sgpr0_sgpr1
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%1:_(<16 x s32>) = G_LOAD %0 :: (load 64, addrspace 4)
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$sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY %1
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...
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