forked from OSchip/llvm-project
166 lines
5.8 KiB
YAML
166 lines
5.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
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---
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name: concat_vectors_v4s16_ss
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; CHECK-LABEL: name: concat_vectors_v4s16_ss
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; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:sgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $sgpr0
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%1:_(<2 x s16>) = COPY $sgpr1
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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...
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---
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name: concat_vectors_v4s16_sv
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; CHECK-LABEL: name: concat_vectors_v4s16_sv
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; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY2]](<2 x s16>), [[COPY1]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $sgpr0
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%1:_(<2 x s16>) = COPY $vgpr0
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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...
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---
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name: concat_vectors_v4s16_vs
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0
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; CHECK-LABEL: name: concat_vectors_v4s16_vs
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; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY2]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(<2 x s16>) = COPY $sgpr0
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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...
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---
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name: concat_vectors_v4s16_vv
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: concat_vectors_v4s16_vv
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; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(<2 x s16>) = COPY $vgpr1
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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...
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---
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name: concat_vectors_v4s16_aa
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legalized: true
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body: |
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bb.0:
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liveins: $agpr0, $agpr1
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; CHECK-LABEL: name: concat_vectors_v4s16_aa
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; CHECK: [[COPY:%[0-9]+]]:agpr(<2 x s16>) = COPY $agpr0
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; CHECK: [[COPY1:%[0-9]+]]:agpr(<2 x s16>) = COPY $agpr1
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:agpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>)
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; CHECK: S_ENDPGM 0, implicit [[CONCAT_VECTORS]](<4 x s16>)
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%0:_(<2 x s16>) = COPY $agpr0
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%1:_(<2 x s16>) = COPY $agpr1
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: concat_vectors_v4s16_av
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legalized: true
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body: |
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bb.0:
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liveins: $agpr0, $vgpr0
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; CHECK-LABEL: name: concat_vectors_v4s16_av
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; CHECK: [[COPY:%[0-9]+]]:agpr(<2 x s16>) = COPY $agpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY2]](<2 x s16>), [[COPY1]](<2 x s16>)
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; CHECK: S_ENDPGM 0, implicit [[CONCAT_VECTORS]](<4 x s16>)
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%0:_(<2 x s16>) = COPY $agpr0
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%1:_(<2 x s16>) = COPY $vgpr0
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: concat_vectors_v4s16_va
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legalized: true
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body: |
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bb.0:
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liveins: $agpr0, $vgpr0
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; CHECK-LABEL: name: concat_vectors_v4s16_va
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; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:agpr(<2 x s16>) = COPY $agpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY2]](<2 x s16>)
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; CHECK: S_ENDPGM 0, implicit [[CONCAT_VECTORS]](<4 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(<2 x s16>) = COPY $agpr0
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: concat_vectors_v4s16_as
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legalized: true
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body: |
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bb.0:
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liveins: $agpr0, $sgpr0
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; CHECK-LABEL: name: concat_vectors_v4s16_as
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; CHECK: [[COPY:%[0-9]+]]:agpr(<2 x s16>) = COPY $agpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY2]](<2 x s16>), [[COPY3]](<2 x s16>)
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; CHECK: S_ENDPGM 0, implicit [[CONCAT_VECTORS]](<4 x s16>)
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%0:_(<2 x s16>) = COPY $agpr0
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%1:_(<2 x s16>) = COPY $sgpr0
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: concat_vectors_v4s16_sa
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legalized: true
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body: |
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bb.0:
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liveins: $agpr0, $sgpr0
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; CHECK-LABEL: name: concat_vectors_v4s16_sa
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; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:agpr(<2 x s16>) = COPY $agpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)
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; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY2]](<2 x s16>), [[COPY3]](<2 x s16>)
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; CHECK: S_ENDPGM 0, implicit [[CONCAT_VECTORS]](<4 x s16>)
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%0:_(<2 x s16>) = COPY $sgpr0
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%1:_(<2 x s16>) = COPY $agpr0
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%2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
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S_ENDPGM 0, implicit %2
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...
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