forked from OSchip/llvm-project
366 lines
15 KiB
YAML
366 lines
15 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=2 -disable-gisel-legality-check -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX8 %s
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# RUN: FileCheck -check-prefixes=ERR-GFX8,ERR %s < %t
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=2 -disable-gisel-legality-check -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX9 %s
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# RUN: FileCheck -check-prefixes=ERR-GFX910,ERR %s < %t
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -global-isel-abort=2 -disable-gisel-legality-check -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX10 %s
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# RUN: FileCheck -check-prefixes=ERR-GFX910,ERR %s < %t
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# ERR-NOT: remark
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# ERR: remark: <unknown>:0:0: cannot select: %4:sgpr(s16) = G_SHL %2:sgpr, %3:sgpr(s16) (in function: shl_s16_s16_ss)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_SHL %2:vgpr, %1:vgpr(s32) (in function: shl_s16_s32_vv)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %5:vgpr(s64) = G_ZEXT %4:vgpr(s16) (in function: shl_s16_vv_zext_to_s64)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %3:sgpr(s16) = G_SHL %2:sgpr, %1:sgpr(s32) (in function: shl_s16_s32_ss)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_SHL %2:sgpr, %1:vgpr(s32) (in function: shl_s16_s32_sv)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_SHL %2:vgpr, %1:sgpr(s32) (in function: shl_s16_s32_vs)
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# ERR-NOT: remark
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---
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name: shl_s16_s16_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; GFX8-LABEL: name: shl_s16_s16_ss
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; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX8: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX8: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX8: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX8: [[SHL:%[0-9]+]]:sgpr(s16) = G_SHL [[TRUNC]], [[TRUNC1]](s16)
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; GFX8: S_ENDPGM 0, implicit [[SHL]](s16)
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; GFX9-LABEL: name: shl_s16_s16_ss
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; GFX9: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX9: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX9: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX9: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX9: [[SHL:%[0-9]+]]:sgpr(s16) = G_SHL [[TRUNC]], [[TRUNC1]](s16)
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; GFX9: S_ENDPGM 0, implicit [[SHL]](s16)
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; GFX10-LABEL: name: shl_s16_s16_ss
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; GFX10: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX10: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX10: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX10: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX10: [[SHL:%[0-9]+]]:sgpr(s16) = G_SHL [[TRUNC]], [[TRUNC1]](s16)
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; GFX10: S_ENDPGM 0, implicit [[SHL]](s16)
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s16) = G_TRUNC %0
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%3:sgpr(s16) = G_TRUNC %1
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%4:sgpr(s16) = G_SHL %2, %3
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S_ENDPGM 0, implicit %4
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...
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---
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name: shl_s16_s16_vs
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GFX8-LABEL: name: shl_s16_s16_vs
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; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX8: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
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; GFX9-LABEL: name: shl_s16_s16_vs
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX9: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX9: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
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; GFX10-LABEL: name: shl_s16_s16_vs
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX10: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX10: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:sgpr(s32) = COPY $sgpr0
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%2:vgpr(s16) = G_TRUNC %0
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%3:sgpr(s16) = G_TRUNC %1
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%4:vgpr(s16) = G_SHL %2, %3
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S_ENDPGM 0, implicit %4
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...
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---
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name: shl_s16_s32_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: shl_s16_s32_vv
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; GFX8: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX8: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX8: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
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; GFX8: S_ENDPGM 0, implicit [[SHL]](s16)
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; GFX9-LABEL: name: shl_s16_s32_vv
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; GFX9: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX9: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX9: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
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; GFX9: S_ENDPGM 0, implicit [[SHL]](s16)
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; GFX10-LABEL: name: shl_s16_s32_vv
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; GFX10: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX10: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX10: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX10: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
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; GFX10: S_ENDPGM 0, implicit [[SHL]](s16)
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s16) = G_TRUNC %0
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%3:vgpr(s16) = G_SHL %2, %1
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S_ENDPGM 0, implicit %3
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...
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---
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name: shl_s16_s16_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: shl_s16_s16_vv
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; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX8: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
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; GFX9-LABEL: name: shl_s16_s16_vv
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX9: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
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; GFX10-LABEL: name: shl_s16_s16_vv
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX10: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX10: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s16) = G_TRUNC %0
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%3:vgpr(s16) = G_TRUNC %1
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%4:vgpr(s16) = G_SHL %2, %3
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S_ENDPGM 0, implicit %4
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...
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---
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name: shl_s16_s16_vv_zext_to_s32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: shl_s16_s16_vv_zext_to_s32
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; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX8: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
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; GFX9-LABEL: name: shl_s16_s16_vv_zext_to_s32
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX9: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
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; GFX10-LABEL: name: shl_s16_s16_vv_zext_to_s32
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX10: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX10: [[V_BFE_U32_:%[0-9]+]]:vgpr_32 = V_BFE_U32 [[V_LSHLREV_B16_e64_]], 0, 16, implicit $exec
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; GFX10: S_ENDPGM 0, implicit [[V_BFE_U32_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s16) = G_TRUNC %0
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%3:vgpr(s16) = G_TRUNC %1
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%4:vgpr(s16) = G_SHL %2, %3
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%5:vgpr(s32) = G_ZEXT %4
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S_ENDPGM 0, implicit %5
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...
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---
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name: shl_s16_vv_zext_to_s64
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: shl_s16_vv_zext_to_s64
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; GFX8: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX8: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX8: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX8: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[TRUNC1]](s16)
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; GFX8: [[ZEXT:%[0-9]+]]:vgpr(s64) = G_ZEXT [[SHL]](s16)
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; GFX8: S_ENDPGM 0, implicit [[ZEXT]](s64)
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; GFX9-LABEL: name: shl_s16_vv_zext_to_s64
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; GFX9: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX9: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX9: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX9: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[TRUNC1]](s16)
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; GFX9: [[ZEXT:%[0-9]+]]:vgpr(s64) = G_ZEXT [[SHL]](s16)
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; GFX9: S_ENDPGM 0, implicit [[ZEXT]](s64)
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; GFX10-LABEL: name: shl_s16_vv_zext_to_s64
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; GFX10: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX10: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX10: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX10: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX10: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[TRUNC1]](s16)
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; GFX10: [[ZEXT:%[0-9]+]]:vgpr(s64) = G_ZEXT [[SHL]](s16)
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; GFX10: S_ENDPGM 0, implicit [[ZEXT]](s64)
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s16) = G_TRUNC %0
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%3:vgpr(s16) = G_TRUNC %1
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%4:vgpr(s16) = G_SHL %2, %3
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%5:vgpr(s64) = G_ZEXT %4
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S_ENDPGM 0, implicit %5
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...
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---
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name: shl_s16_s32_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; GFX8-LABEL: name: shl_s16_s32_ss
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; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX8: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX8: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX8: [[SHL:%[0-9]+]]:sgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
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; GFX8: S_ENDPGM 0, implicit [[SHL]](s16)
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; GFX9-LABEL: name: shl_s16_s32_ss
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; GFX9: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX9: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX9: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX9: [[SHL:%[0-9]+]]:sgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
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; GFX9: S_ENDPGM 0, implicit [[SHL]](s16)
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; GFX10-LABEL: name: shl_s16_s32_ss
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; GFX10: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX10: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX10: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX10: [[SHL:%[0-9]+]]:sgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
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; GFX10: S_ENDPGM 0, implicit [[SHL]](s16)
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s16) = G_TRUNC %0
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%3:sgpr(s16) = G_SHL %2, %1
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S_ENDPGM 0, implicit %3
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...
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---
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name: shl_s16_s32_sv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GFX8-LABEL: name: shl_s16_s32_sv
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; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX8: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX8: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
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; GFX8: S_ENDPGM 0, implicit [[SHL]](s16)
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; GFX9-LABEL: name: shl_s16_s32_sv
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; GFX9: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX9: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX9: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
|
|
; GFX9: S_ENDPGM 0, implicit [[SHL]](s16)
|
|
; GFX10-LABEL: name: shl_s16_s32_sv
|
|
; GFX10: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX10: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX10: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
|
|
; GFX10: S_ENDPGM 0, implicit [[SHL]](s16)
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:vgpr(s32) = COPY $vgpr0
|
|
%2:sgpr(s16) = G_TRUNC %0
|
|
%3:vgpr(s16) = G_SHL %2, %1
|
|
S_ENDPGM 0, implicit %3
|
|
...
|
|
|
|
---
|
|
name: shl_s16_s16_sv
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0, $vgpr0
|
|
; GFX8-LABEL: name: shl_s16_s16_sv
|
|
; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX8: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX8: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
|
|
; GFX9-LABEL: name: shl_s16_s16_sv
|
|
; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX9: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX9: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
|
|
; GFX10-LABEL: name: shl_s16_s16_sv
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX10: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX10: S_ENDPGM 0, implicit [[V_LSHLREV_B16_e64_]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:vgpr(s32) = COPY $vgpr0
|
|
%2:sgpr(s16) = G_TRUNC %0
|
|
%3:vgpr(s16) = G_TRUNC %1
|
|
%4:vgpr(s16) = G_SHL %2, %3
|
|
S_ENDPGM 0, implicit %4
|
|
...
|
|
|
|
---
|
|
name: shl_s16_s32_vs
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0, $vgpr0
|
|
; GFX8-LABEL: name: shl_s16_s32_vs
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX8: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX8: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX8: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
|
|
; GFX8: S_ENDPGM 0, implicit [[SHL]](s16)
|
|
; GFX9-LABEL: name: shl_s16_s32_vs
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX9: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX9: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX9: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
|
|
; GFX9: S_ENDPGM 0, implicit [[SHL]](s16)
|
|
; GFX10-LABEL: name: shl_s16_s32_vs
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX10: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX10: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX10: [[SHL:%[0-9]+]]:vgpr(s16) = G_SHL [[TRUNC]], [[COPY1]](s32)
|
|
; GFX10: S_ENDPGM 0, implicit [[SHL]](s16)
|
|
%0:vgpr(s32) = COPY $vgpr0
|
|
%1:sgpr(s32) = COPY $sgpr0
|
|
%2:vgpr(s16) = G_TRUNC %0
|
|
%3:vgpr(s16) = G_SHL %2, %1
|
|
S_ENDPGM 0, implicit %3
|
|
...
|