Ahmed Bougacha d0ce058f2c [AArch64] Don't combine "select (setcc i1 LHS, RHS), vL, vR". ... r208210 introduced an optimization that improves the vector select codegen by doing the setcc on vectors directly. This is a problem they the setcc operands are i1s, because the optimization would create vectors of i1, which aren't legal. Part of PR21549. Differential Revision: http://reviews.llvm.org/D6308 llvm-svn: 223075		2014-12-01 20:59:00 +00:00
clang	Add missing 'break's, found by inspection. No functionality change; the	2014-12-01 18:59:10 +00:00
clang-tools-extra	[clang-tidy] google-explicit-constructor: don't match in template instantiations	2014-11-30 19:41:41 +00:00
compiler-rt	Add a HasSuppressionType method into SuppressionContext	2014-11-29 14:18:05 +00:00
debuginfo-tests	New round of fixes for "Always compile debuginfo-tests for the host triple"	2014-10-18 23:47:59 +00:00
libclc	Don't include <stddef.h>	2014-11-18 14:19:27 +00:00
libcxx	libc++: add NaCl and PNaCl support for std::random_device	2014-12-01 19:19:55 +00:00
libcxxabi	Fix comment on end of #endif to match #if	2014-11-25 03:19:02 +00:00
lld	[Core] Remove function to not override RoundTripPasses.	2014-12-01 20:28:54 +00:00
lldb	Add support for 32-bit i386 binaries.	2014-11-29 09:17:40 +00:00
llgo	Initial commit of llgo third_party.	2014-11-27 00:12:26 +00:00
llvm	[AArch64] Don't combine "select (setcc i1 LHS, RHS), vL, vR".	2014-12-01 20:59:00 +00:00
openmp	I apologise in advance for the size of this check-in. At Intel we do	2014-10-07 16:25:50 +00:00
polly	Drop unused enum value	2014-11-30 15:57:07 +00:00