forked from OSchip/llvm-project
202 lines
8.1 KiB
LLVM
202 lines
8.1 KiB
LLVM
; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi,+tbm < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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; Stack reload folding tests.
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;
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; By including a nop call with sideeffects we can force a partial register spill of the
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; relevant registers and check that the reload is correctly folded into the instruction.
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define i32 @stack_fold_bextri_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_bextri_u32
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;CHECK: # %bb.0:
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;CHECK: bextrl $2814, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 2814)
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ret i32 %2
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}
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declare i32 @llvm.x86.tbm.bextri.u32(i32, i32)
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define i64 @stack_fold_bextri_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_bextri_u64
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;CHECK: # %bb.0:
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;CHECK: bextrq $2814, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 2814)
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ret i64 %2
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}
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declare i64 @llvm.x86.tbm.bextri.u64(i64, i64)
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define i32 @stack_fold_blcfill_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_blcfill_u32
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;CHECK: blcfilll {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i32 %a0, 1
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%3 = and i32 %a0, %2
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ret i32 %3
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}
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define i64 @stack_fold_blcfill_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_blcfill_u64
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;CHECK: blcfillq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i64 %a0, 1
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%3 = and i64 %a0, %2
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ret i64 %3
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}
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define i32 @stack_fold_blci_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_blci_u32
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;CHECK: blcil {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i32 %a0, 1
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%3 = xor i32 %2, -1
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%4 = or i32 %a0, %3
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ret i32 %4
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}
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define i64 @stack_fold_blci_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_blci_u64
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;CHECK: blciq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i64 %a0, 1
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%3 = xor i64 %2, -1
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%4 = or i64 %a0, %3
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ret i64 %4
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}
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define i32 @stack_fold_blcic_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_blcic_u32
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;CHECK: blcicl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i32 %a0, 1
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%3 = xor i32 %a0, -1
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%4 = and i32 %2, %3
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ret i32 %4
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}
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define i64 @stack_fold_blcic_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_blcic_u64
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;CHECK: blcicq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i64 %a0, 1
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%3 = xor i64 %a0, -1
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%4 = and i64 %2, %3
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ret i64 %4
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}
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define i32 @stack_fold_blcmsk_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_blcmsk_u32
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;CHECK: blcmskl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i32 %a0, 1
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%3 = xor i32 %a0, %2
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ret i32 %3
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}
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define i64 @stack_fold_blcmsk_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_blcmsk_u64
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;CHECK: blcmskq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i64 %a0, 1
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%3 = xor i64 %a0, %2
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ret i64 %3
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}
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define i32 @stack_fold_blcs_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_blcs_u32
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;CHECK: blcsl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i32 %a0, 1
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%3 = or i32 %a0, %2
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ret i32 %3
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}
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define i64 @stack_fold_blcs_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_blcs_u64
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;CHECK: blcsq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i64 %a0, 1
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%3 = or i64 %a0, %2
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ret i64 %3
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}
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define i32 @stack_fold_blsfill_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_blsfill_u32
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;CHECK: blsfilll {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = sub i32 %a0, 1
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%3 = or i32 %a0, %2
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ret i32 %3
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}
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define i64 @stack_fold_blsfill_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_blsfill_u64
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;CHECK: blsfillq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = sub i64 %a0, 1
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%3 = or i64 %a0, %2
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ret i64 %3
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}
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define i32 @stack_fold_blsic_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_blsic_u32
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;CHECK: blsicl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = sub i32 %a0, 1
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%3 = xor i32 %a0, -1
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%4 = or i32 %2, %3
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ret i32 %4
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}
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define i64 @stack_fold_blsic_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_blsic_u64
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;CHECK: blsicq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = sub i64 %a0, 1
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%3 = xor i64 %a0, -1
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%4 = or i64 %2, %3
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ret i64 %4
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}
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define i32 @stack_fold_t1mskc_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_t1mskc_u32
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;CHECK: t1mskcl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i32 %a0, 1
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%3 = xor i32 %a0, -1
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%4 = or i32 %2, %3
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ret i32 %4
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}
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define i64 @stack_fold_t1mskc_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_t1mskc_u64
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;CHECK: t1mskcq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = add i64 %a0, 1
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%3 = xor i64 %a0, -1
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%4 = or i64 %2, %3
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ret i64 %4
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}
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define i32 @stack_fold_tzmsk_u32(i32 %a0) {
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;CHECK-LABEL: stack_fold_tzmsk_u32
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;CHECK: tzmskl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = sub i32 %a0, 1
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%3 = xor i32 %a0, -1
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%4 = and i32 %2, %3
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ret i32 %4
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}
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define i64 @stack_fold_tzmsk_u64(i64 %a0) {
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;CHECK-LABEL: stack_fold_tzmsk_u64
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;CHECK: tzmskq {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = sub i64 %a0, 1
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%3 = xor i64 %a0, -1
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%4 = and i64 %2, %3
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ret i64 %4
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}
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