forked from OSchip/llvm-project
189 lines
4.3 KiB
LLVM
189 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=ALL --check-prefix=BMI2
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define i64 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone {
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; ALL-LABEL: foo:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movl %edx, %ecx
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; ALL-NEXT: rolq %cl, %rdi
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; ALL-NEXT: movq %rdi, %rax
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; ALL-NEXT: retq
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entry:
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%0 = shl i64 %x, %z
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%1 = sub i64 64, %z
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%2 = lshr i64 %x, %1
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%3 = or i64 %2, %0
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ret i64 %3
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}
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define i64 @bar(i64 %x, i64 %y, i64 %z) nounwind readnone {
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; ALL-LABEL: bar:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movl %edx, %ecx
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; ALL-NEXT: shldq %cl, %rdi, %rsi
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; ALL-NEXT: movq %rsi, %rax
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; ALL-NEXT: retq
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entry:
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%0 = shl i64 %y, %z
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%1 = sub i64 64, %z
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%2 = lshr i64 %x, %1
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%3 = or i64 %2, %0
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ret i64 %3
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}
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define i64 @un(i64 %x, i64 %y, i64 %z) nounwind readnone {
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; ALL-LABEL: un:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movl %edx, %ecx
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; ALL-NEXT: rorq %cl, %rdi
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; ALL-NEXT: movq %rdi, %rax
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; ALL-NEXT: retq
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entry:
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%0 = lshr i64 %x, %z
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%1 = sub i64 64, %z
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%2 = shl i64 %x, %1
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%3 = or i64 %2, %0
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ret i64 %3
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}
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define i64 @bu(i64 %x, i64 %y, i64 %z) nounwind readnone {
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; ALL-LABEL: bu:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movl %edx, %ecx
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; ALL-NEXT: shrdq %cl, %rdi, %rsi
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; ALL-NEXT: movq %rsi, %rax
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; ALL-NEXT: retq
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entry:
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%0 = lshr i64 %y, %z
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%1 = sub i64 64, %z
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%2 = shl i64 %x, %1
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%3 = or i64 %2, %0
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ret i64 %3
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}
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define i64 @xfoo(i64 %x, i64 %y, i64 %z) nounwind readnone {
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; X64-LABEL: xfoo:
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; X64: # %bb.0: # %entry
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; X64-NEXT: rolq $7, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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;
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; SHLD-LABEL: xfoo:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: shldq $7, %rdi, %rdi
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; SHLD-NEXT: movq %rdi, %rax
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; SHLD-NEXT: retq
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;
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; BMI2-LABEL: xfoo:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: rorxq $57, %rdi, %rax
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; BMI2-NEXT: retq
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entry:
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%0 = lshr i64 %x, 57
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%1 = shl i64 %x, 7
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%2 = or i64 %0, %1
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ret i64 %2
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}
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define i64 @xfoop(i64* %p) nounwind readnone {
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; X64-LABEL: xfoop:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movq (%rdi), %rax
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; X64-NEXT: rolq $7, %rax
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; X64-NEXT: retq
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;
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; SHLD-LABEL: xfoop:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movq (%rdi), %rax
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; SHLD-NEXT: shldq $7, %rax, %rax
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; SHLD-NEXT: retq
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;
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; BMI2-LABEL: xfoop:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: rorxq $57, (%rdi), %rax
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; BMI2-NEXT: retq
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entry:
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%x = load i64, i64* %p
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%a = lshr i64 %x, 57
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%b = shl i64 %x, 7
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%c = or i64 %a, %b
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ret i64 %c
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}
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define i64 @xbar(i64 %x, i64 %y, i64 %z) nounwind readnone {
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; ALL-LABEL: xbar:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: shrdq $57, %rsi, %rdi
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; ALL-NEXT: movq %rdi, %rax
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; ALL-NEXT: retq
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entry:
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%0 = shl i64 %y, 7
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%1 = lshr i64 %x, 57
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%2 = or i64 %0, %1
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ret i64 %2
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}
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define i64 @xun(i64 %x, i64 %y, i64 %z) nounwind readnone {
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; X64-LABEL: xun:
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; X64: # %bb.0: # %entry
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; X64-NEXT: rolq $57, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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;
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; SHLD-LABEL: xun:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: shldq $57, %rdi, %rdi
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; SHLD-NEXT: movq %rdi, %rax
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; SHLD-NEXT: retq
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;
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; BMI2-LABEL: xun:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: rorxq $7, %rdi, %rax
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; BMI2-NEXT: retq
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entry:
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%0 = lshr i64 %x, 7
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%1 = shl i64 %x, 57
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%2 = or i64 %0, %1
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ret i64 %2
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}
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define i64 @xunp(i64* %p) nounwind readnone {
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; X64-LABEL: xunp:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movq (%rdi), %rax
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; X64-NEXT: rolq $57, %rax
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; X64-NEXT: retq
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;
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; SHLD-LABEL: xunp:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movq (%rdi), %rax
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; SHLD-NEXT: shldq $57, %rax, %rax
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; SHLD-NEXT: retq
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;
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; BMI2-LABEL: xunp:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: rorxq $7, (%rdi), %rax
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; BMI2-NEXT: retq
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entry:
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%x = load i64, i64* %p
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%a = lshr i64 %x, 7
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%b = shl i64 %x, 57
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%c = or i64 %a, %b
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ret i64 %c
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}
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define i64 @xbu(i64 %x, i64 %y, i64 %z) nounwind readnone {
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; ALL-LABEL: xbu:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: shldq $57, %rsi, %rdi
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; ALL-NEXT: movq %rdi, %rax
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; ALL-NEXT: retq
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entry:
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%0 = lshr i64 %y, 7
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%1 = shl i64 %x, 57
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%2 = or i64 %0, %1
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ret i64 %2
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}
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