llvm-project/llvm/test/CodeGen/X86/avx512-shuffles
Craig Topper 25ceba7f30 [X86] Remove X86ISD::SHUF128 from combineBitcastForMaskedOp. Use isel patterns instead.
We always created X86ISD::SHUF128 with a 64-bit element type so we can use isel patterns to detect a bitconvert to 32-bit to handle masking.

The test changes are because we also match the bitconvert even if there is no masking. This leads to unnecessary isel pattern, but it requires more multiclass hackery in tablegen to get rid of it.

llvm-svn: 324205
2018-02-05 06:00:23 +00:00
..
broadcast-scalar-fp.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
broadcast-scalar-int.ll [X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector. 2018-01-27 20:19:09 +00:00
broadcast-vector-fp.ll [X86][AVX] lowerVectorShuffleAsBroadcast - aggressively peek through BITCASTs 2017-12-16 23:32:18 +00:00
broadcast-vector-int.ll [X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector. 2018-01-27 20:19:09 +00:00
duplicate-high.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
duplicate-low.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
in_lane_permute.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
partial_permute.ll Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
permute.ll [X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector. 2018-01-27 20:19:09 +00:00
shuffle-interleave.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
shuffle-vec.ll [X86] Remove X86ISD::SHUF128 from combineBitcastForMaskedOp. Use isel patterns instead. 2018-02-05 06:00:23 +00:00
shuffle.ll [X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector. 2018-01-27 20:19:09 +00:00
unpack.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00