forked from OSchip/llvm-project
a80352c04e
If the producing instruction is legacy encoded it doesn't implicitly zero the upper bits. This is important for the SHA instructions which don't have a VEX encoded version. We might also be able to hit this with the incomplete f128 support that hasn't been ported to VEX. llvm-svn: 338812 |
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unittests | ||
utils | ||
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CODE_OWNERS.TXT | ||
CREDITS.TXT | ||
LICENSE.TXT | ||
LLVMBuild.txt | ||
README.txt | ||
RELEASE_TESTERS.TXT | ||
configure | ||
llvm.spec.in |
README.txt
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