maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen
History
Jay Foad 0412f518dc [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr 
Summary:
The typo has been present since memOpsHaveSameBasePtr was introduced in
r313208.

It caused SIInstrInfo::shouldClusterMemOps to cluster more mem ops than
it was supposed to.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71616
 		2019-12-17 18:54:27 +00:00
..
AArch64 [SDAG] adjust isNegatibleForFree calculation to avoid crashing 2019-12-17 13:49:15 -05:00
AMDGPU [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr 2019-12-17 18:54:27 +00:00
ARC
…
ARM [PGO][PGSO] Enable size optimizations in code gen / target passes for cold code. 2019-12-13 11:01:19 -08:00
AVR
…
BPF [BPF] put not-section-attribute externs into BTF ".extern" data section 2019-12-10 11:45:17 -08:00
Generic [CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size isn't power of 2 2019-11-02 23:59:12 -04:00
Hexagon [ModuloSchedule] Fix a bug in experimental expander 2019-11-23 16:01:47 -08:00
Inputs
…
Lanai
…
MIR [llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands. 2019-12-16 18:25:04 -05:00
MSP430 [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (4) 2019-11-13 09:23:08 +01:00
Mips [Mips] Add support for min/max/umin/umax atomics 2019-12-12 11:32:37 +01:00
NVPTX [NVPTX] Added llvm.nvvm.mma.m8n8k4.* intrinsics 2019-10-28 13:55:30 -07:00
PowerPC [NFC][Test][PowerPC] Add the test to verify the mask with constant 2019-12-17 07:04:19 +00:00
RISCV [RISCV] Add subtargets initialized with target feature 2019-12-17 09:34:01 -08:00
SPARC Temporarily run machine-verifier once in test/CodeGen/SPARC/fp128.ll, so that 2019-12-03 11:21:52 +01:00
SystemZ [SystemZ][FPEnv] Back-end support for STRICT_[SU]INT_TO_FP 2019-12-17 18:24:05 +01:00
Thumb Revert "ARM-Darwin: keep the frame register reserved even if not updated." 2019-12-06 10:59:26 -08:00
Thumb2 [ARM][MVE][Intrinsics] All vqdmulhq/vqrdmulhq tests should be for signed numbers. 2019-12-13 17:29:59 +00:00
WebAssembly [WebAssembly] Replace SIMD int min/max builtins with patterns 2019-12-16 11:48:49 -08:00
WinCFGuard [WinCFG] Handle constant casts carefully in .gfids emission 2019-11-01 13:32:03 -07:00
WinEH
…
X86 [SDAG] adjust isNegatibleForFree calculation to avoid crashing 2019-12-17 13:49:15 -05:00
XCore
…