forked from OSchip/llvm-project
58 lines
1.9 KiB
LLVM
58 lines
1.9 KiB
LLVM
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s
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; Verify that we're folding the load into the math instruction.
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; FIXME: The folding should also happen without the avx attribute;
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; ie, when generating SSE (non-VEX-prefixed) instructions.
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define float @rcpss(float* %a) {
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; CHECK-LABEL: rcpss:
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; CHECK: vrcpss (%rdi), %xmm0, %xmm0
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define float @rsqrtss(float* %a) {
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; CHECK-LABEL: rsqrtss:
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; CHECK: vrsqrtss (%rdi), %xmm0, %xmm0
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define float @sqrtss(float* %a) {
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; CHECK-LABEL: sqrtss:
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; CHECK: vsqrtss (%rdi), %xmm0, %xmm0
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define double @sqrtsd(double* %a) {
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; CHECK-LABEL: sqrtsd:
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; CHECK: vsqrtsd (%rdi), %xmm0, %xmm0
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%ld = load double, double* %a
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%ins = insertelement <2 x double> undef, double %ld, i32 0
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%res = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %ins)
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%ext = extractelement <2 x double> %res, i32 0
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ret double %ext
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}
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declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone
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declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
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declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone
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declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone
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