forked from OSchip/llvm-project
61 lines
2.2 KiB
ArmAsm
61 lines
2.2 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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lsrr z0.b, p0/m, z0.b, z0.b
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// CHECK-INST: lsrr z0.b, p0/m, z0.b, z0.b
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// CHECK-ENCODING: [0x00,0x80,0x15,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 15 04 <unknown>
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lsrr z0.h, p0/m, z0.h, z0.h
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// CHECK-INST: lsrr z0.h, p0/m, z0.h, z0.h
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// CHECK-ENCODING: [0x00,0x80,0x55,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 55 04 <unknown>
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lsrr z0.s, p0/m, z0.s, z0.s
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// CHECK-INST: lsrr z0.s, p0/m, z0.s, z0.s
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// CHECK-ENCODING: [0x00,0x80,0x95,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 95 04 <unknown>
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lsrr z0.d, p0/m, z0.d, z0.d
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// CHECK-INST: lsrr z0.d, p0/m, z0.d, z0.d
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// CHECK-ENCODING: [0x00,0x80,0xd5,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 d5 04 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z5.d, p0/z, z7.d
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// CHECK-INST: movprfx z5.d, p0/z, z7.d
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// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
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lsrr z5.d, p0/m, z5.d, z0.d
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// CHECK-INST: lsrr z5.d, p0/m, z5.d, z0.d
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// CHECK-ENCODING: [0x05,0x80,0xd5,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 05 80 d5 04 <unknown>
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movprfx z5, z7
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// CHECK-INST: movprfx z5, z7
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// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
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lsrr z5.d, p0/m, z5.d, z0.d
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// CHECK-INST: lsrr z5.d, p0/m, z5.d, z0.d
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// CHECK-ENCODING: [0x05,0x80,0xd5,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 05 80 d5 04 <unknown>
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