Sanjoy Das aa63dc0e9a Fix LLVM's handling and detection of skylake and cannonlake CPUs ... Summary: - Rename `"skylake"` == SkylakeServerProc to `"skylake-avx512"` - Change `"skylake"` to denote SkylakeClientProc - Fix the detection of cpu family 6 and model 94 to be SkylakeClientProc instead of SkylakeServerProc - Remove the `"cnl"` for CannonLake Reviewers: craig.topper, delena Subscribers: zansari, echristo, qcolombet, RKSimon, spatel, DavidKreitzer, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D17090 llvm-svn: 261482		2016-02-21 17:12:03 +00:00
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AArch64	[AArch64][ShrinkWrap] Fix bug in prolog clobbering live reg when shrink wrapping.	2016-02-19 18:27:32 +00:00
AMDGPU	AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer	2016-02-20 00:37:25 +00:00
ARM	[RegAllocFast] Properly track the physical register definitions on calls.	2016-02-20 00:32:29 +00:00
BPF	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
CPP	…
Generic	Revert r261070, it caused PR26652 / PR26653.	2016-02-17 18:47:29 +00:00
Hexagon	[Hexagon] Implement TLS support	2016-02-18 15:42:57 +00:00
Inputs	DI: Reverse direction of subprogram -> function edge.	2015-11-05 22:03:56 +00:00
MIR	When printing MIR, output to errs() rather than outs().	2016-02-19 00:18:46 +00:00
MSP430	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
Mips	[MC][ELF] Handle MIPS specific .sdata and .sbss directives	2016-02-11 06:45:54 +00:00
NVPTX	[NVPTX] Test that MachineSink won't sink across llvm.cuda.syncthreads.	2016-02-17 17:46:52 +00:00
PowerPC	When printing MIR, output to errs() rather than outs().	2016-02-19 00:18:46 +00:00
SPARC	[SPARC] Revamp AnalyzeBranch and add ReverseBranchCondition.	2016-01-13 04:44:14 +00:00
SystemZ	[SystemZ] Fix ABI for i128 argument and return types	2016-02-19 14:10:21 +00:00
Thumb	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
Thumb2	[SCEV] Try to reuse existing value during SCEV expansion	2016-02-04 01:27:38 +00:00
WebAssembly	[WebAssembly] Support physical registers in the rewrite-to-discard optimization.	2016-02-21 03:27:22 +00:00
WinEH	[WinEH] Optimize WinEH state stores	2016-02-17 18:37:11 +00:00
X86	Fix LLVM's handling and detection of skylake and cannonlake CPUs	2016-02-21 17:12:03 +00:00
XCore	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00