forked from OSchip/llvm-project
47 lines
1.5 KiB
LLVM
47 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -disable-output -print-mustexecute %s 2>&1 | FileCheck %s
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; In general the CFG below is easily simplified but this is useful for
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; pass ordering issue elimination.
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define i1 @const_cond(i32 %high) {
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; CHECK-LABEL: @const_cond(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; (mustexec in: loop)
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; CHECK-NEXT: br i1 true, label [[NEXT:%.*]], label [[NEVER1:%.*]] ; (mustexec in: loop)
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; CHECK: next:
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; CHECK-NEXT: br i1 false, label [[NEVER2:%.*]], label [[BACKEDGE]] ; (mustexec in: loop)
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; CHECK: backedge:
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1 ; (mustexec in: loop)
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; CHECK-NEXT: [[EXIT_TEST:%.*]] = icmp slt i32 [[IV]], [[HIGH:%.*]] ; (mustexec in: loop)
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; CHECK-NEXT: br i1 [[EXIT_TEST]], label [[LOOP]], label [[EXIT:%.*]] ; (mustexec in: loop)
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; CHECK: exit:
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; CHECK-NEXT: ret i1 false
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; CHECK: never1:
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; CHECK-NEXT: unreachable
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; CHECK: never2:
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; CHECK-NEXT: unreachable
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [0, %entry], [%iv.next, %backedge]
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br i1 true, label %next, label %never1
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next:
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br i1 false, label %never2, label %backedge
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backedge:
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%iv.next = add nsw nuw i32 %iv, 1
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%exit.test = icmp slt i32 %iv, %high
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br i1 %exit.test, label %loop, label %exit
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exit:
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ret i1 false
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never1:
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unreachable
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never2:
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unreachable
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}
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