forked from OSchip/llvm-project
29 lines
1.2 KiB
Plaintext
29 lines
1.2 KiB
Plaintext
{
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"context" : "{ : }",
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"name" : "for.preheader => for.end10",
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"statements" : [
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{
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"accesses" : [
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{
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"kind" : "write",
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"relation" : "{ Stmt_for_preheader[i0] -> MemRef_acc_reg2mem[0] }"
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}
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],
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"domain" : "{ Stmt_for_preheader[i0] : i0 >= 0 and i0 <= 19 }",
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"name" : "Stmt_for_preheader",
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"schedule" : "{ Stmt_for_preheader[i0] -> [o0, o1, i0, 19i0, 0] : exists (e0 = [(o1)/32], e1 = [(o0)/32]: 32e0 = o1 and 32e1 = o0 and o0 <= i0 and o0 >= -31 + i0 and o1 <= 19i0 and o1 >= -31 + 19i0 and i0 >= 0 and i0 <= 19) }"
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},
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{
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"accesses" : [
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{
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"kind" : "write",
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"relation" : "{ Stmt_for_inc[i0, i1] -> MemRef_acc_reg2mem[0] }"
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}
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],
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"domain" : "{ Stmt_for_inc[i0, i1] : i0 >= 0 and i0 <= 19 and i1 >= 0 and i1 <= 19 }",
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"name" : "Stmt_for_inc",
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"schedule" : "{ Stmt_for_inc[i0, i1] -> [o0, o1, i0, 19i0 + i1, 1] : exists (e0 = [(o1)/32], e1 = [(o0)/32]: 32e0 = o1 and 32e1 = o0 and o0 <= i0 and o0 >= -31 + i0 and o1 <= 19i0 + i1 and o1 >= -31 + 19i0 + i1 and i0 >= 0 and i0 <= 19 and i1 >= 0 and i1 <= 19) }"
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}
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]
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}
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